1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park#include <sunxi_def.h> 10*54fd6939SJiyong Park#include <sunxi_mmap.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park .globl plat_crash_console_init 13*54fd6939SJiyong Park .globl plat_crash_console_putc 14*54fd6939SJiyong Park .globl plat_crash_console_flush 15*54fd6939SJiyong Park .globl plat_my_core_pos 16*54fd6939SJiyong Park .globl platform_mem_init 17*54fd6939SJiyong Park .globl plat_report_exception 18*54fd6939SJiyong Park 19*54fd6939SJiyong Parkfunc plat_crash_console_init 20*54fd6939SJiyong Park mov_imm x0, SUNXI_UART0_BASE 21*54fd6939SJiyong Park mov_imm x1, SUNXI_UART0_CLK_IN_HZ 22*54fd6939SJiyong Park mov_imm x2, SUNXI_UART0_BAUDRATE 23*54fd6939SJiyong Park b console_16550_core_init 24*54fd6939SJiyong Parkendfunc plat_crash_console_init 25*54fd6939SJiyong Park 26*54fd6939SJiyong Parkfunc plat_crash_console_putc 27*54fd6939SJiyong Park mov_imm x1, SUNXI_UART0_BASE 28*54fd6939SJiyong Park b console_16550_core_putc 29*54fd6939SJiyong Parkendfunc plat_crash_console_putc 30*54fd6939SJiyong Park 31*54fd6939SJiyong Parkfunc plat_crash_console_flush 32*54fd6939SJiyong Park ret 33*54fd6939SJiyong Parkendfunc plat_crash_console_flush 34*54fd6939SJiyong Park 35*54fd6939SJiyong Parkfunc plat_my_core_pos 36*54fd6939SJiyong Park mrs x0, mpidr_el1 37*54fd6939SJiyong Park and x1, x0, #MPIDR_CLUSTER_MASK 38*54fd6939SJiyong Park and x0, x0, #MPIDR_CPU_MASK 39*54fd6939SJiyong Park add x0, x0, x1, LSR #6 40*54fd6939SJiyong Park ret 41*54fd6939SJiyong Parkendfunc plat_my_core_pos 42*54fd6939SJiyong Park 43*54fd6939SJiyong Parkfunc platform_mem_init 44*54fd6939SJiyong Park ret 45*54fd6939SJiyong Parkendfunc platform_mem_init 46*54fd6939SJiyong Park 47*54fd6939SJiyong Parkfunc plat_report_exception 48*54fd6939SJiyong Park ret 49*54fd6939SJiyong Parkendfunc plat_report_exception 50