1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2020, Arm Limited. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park .global mtpmu_disable 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park/* ------------------------------------------------------------- 13*54fd6939SJiyong Park * The functions in this file are called at entrypoint, before 14*54fd6939SJiyong Park * the CPU has decided whether this is a cold or a warm boot. 15*54fd6939SJiyong Park * Therefore there are no stack yet to rely on for a C function 16*54fd6939SJiyong Park * call. 17*54fd6939SJiyong Park * ------------------------------------------------------------- 18*54fd6939SJiyong Park */ 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park/* 21*54fd6939SJiyong Park * bool mtpmu_supported(void) 22*54fd6939SJiyong Park * 23*54fd6939SJiyong Park * Return a boolean indicating whether FEAT_MTPMU is supported or not. 24*54fd6939SJiyong Park * 25*54fd6939SJiyong Park * Trash registers: x0, x1 26*54fd6939SJiyong Park */ 27*54fd6939SJiyong Parkfunc mtpmu_supported 28*54fd6939SJiyong Park mrs x0, id_aa64dfr0_el1 29*54fd6939SJiyong Park mov_imm x1, ID_AA64DFR0_MTPMU_MASK 30*54fd6939SJiyong Park and x0, x1, x0, LSR #ID_AA64DFR0_MTPMU_SHIFT 31*54fd6939SJiyong Park cmp x0, ID_AA64DFR0_MTPMU_SUPPORTED 32*54fd6939SJiyong Park cset x0, eq 33*54fd6939SJiyong Park ret 34*54fd6939SJiyong Parkendfunc mtpmu_supported 35*54fd6939SJiyong Park 36*54fd6939SJiyong Park/* 37*54fd6939SJiyong Park * bool el_implemented(unsigned int el_shift) 38*54fd6939SJiyong Park * 39*54fd6939SJiyong Park * Return a boolean indicating if the specified EL is implemented. 40*54fd6939SJiyong Park * The EL is represented as the bitmask shift on id_aa64pfr0_el1 register. 41*54fd6939SJiyong Park * 42*54fd6939SJiyong Park * Trash registers: x0, x1 43*54fd6939SJiyong Park */ 44*54fd6939SJiyong Parkfunc el_implemented 45*54fd6939SJiyong Park mrs x1, id_aa64pfr0_el1 46*54fd6939SJiyong Park lsr x1, x1, x0 47*54fd6939SJiyong Park cmp x1, #ID_AA64PFR0_ELX_MASK 48*54fd6939SJiyong Park cset x0, eq 49*54fd6939SJiyong Park ret 50*54fd6939SJiyong Parkendfunc el_implemented 51*54fd6939SJiyong Park 52*54fd6939SJiyong Park/* 53*54fd6939SJiyong Park * void mtpmu_disable(void) 54*54fd6939SJiyong Park * 55*54fd6939SJiyong Park * Disable mtpmu feature if supported. 56*54fd6939SJiyong Park * 57*54fd6939SJiyong Park * Trash register: x0, x1, x30 58*54fd6939SJiyong Park */ 59*54fd6939SJiyong Parkfunc mtpmu_disable 60*54fd6939SJiyong Park mov x10, x30 61*54fd6939SJiyong Park bl mtpmu_supported 62*54fd6939SJiyong Park cbz x0, exit_disable 63*54fd6939SJiyong Park 64*54fd6939SJiyong Park /* FEAT_MTMPU Supported */ 65*54fd6939SJiyong Park mov_imm x0, ID_AA64PFR0_EL3_SHIFT 66*54fd6939SJiyong Park bl el_implemented 67*54fd6939SJiyong Park cbz x0, 1f 68*54fd6939SJiyong Park 69*54fd6939SJiyong Park /* EL3 implemented */ 70*54fd6939SJiyong Park mrs x0, mdcr_el3 71*54fd6939SJiyong Park mov_imm x1, MDCR_MTPME_BIT 72*54fd6939SJiyong Park bic x0, x0, x1 73*54fd6939SJiyong Park msr mdcr_el3, x0 74*54fd6939SJiyong Park 75*54fd6939SJiyong Park /* 76*54fd6939SJiyong Park * If EL3 is implemented, MDCR_EL2.MTPME is implemented as Res0 and 77*54fd6939SJiyong Park * FEAT_MTPMU is controlled only from EL3, so no need to perform 78*54fd6939SJiyong Park * any operations for EL2. 79*54fd6939SJiyong Park */ 80*54fd6939SJiyong Park isb 81*54fd6939SJiyong Parkexit_disable: 82*54fd6939SJiyong Park ret x10 83*54fd6939SJiyong Park1: 84*54fd6939SJiyong Park /* EL3 not implemented */ 85*54fd6939SJiyong Park mov_imm x0, ID_AA64PFR0_EL2_SHIFT 86*54fd6939SJiyong Park bl el_implemented 87*54fd6939SJiyong Park cbz x0, exit_disable 88*54fd6939SJiyong Park 89*54fd6939SJiyong Park /* EL2 implemented */ 90*54fd6939SJiyong Park mrs x0, mdcr_el2 91*54fd6939SJiyong Park mov_imm x1, MDCR_EL2_MTPME 92*54fd6939SJiyong Park bic x0, x0, x1 93*54fd6939SJiyong Park msr mdcr_el2, x0 94*54fd6939SJiyong Park isb 95*54fd6939SJiyong Park ret x10 96*54fd6939SJiyong Parkendfunc mtpmu_disable 97