1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2021, Arm Limited. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park#include <common/bl_common.h> 10*54fd6939SJiyong Park#include <neoverse_demeter.h> 11*54fd6939SJiyong Park#include <cpu_macros.S> 12*54fd6939SJiyong Park#include <plat_macros.S> 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park/* Hardware handled coherency */ 15*54fd6939SJiyong Park#if HW_ASSISTED_COHERENCY == 0 16*54fd6939SJiyong Park#error "Neoverse Demeter must be compiled with HW_ASSISTED_COHERENCY enabled" 17*54fd6939SJiyong Park#endif 18*54fd6939SJiyong Park 19*54fd6939SJiyong Park/* 64-bit only core */ 20*54fd6939SJiyong Park#if CTX_INCLUDE_AARCH32_REGS == 1 21*54fd6939SJiyong Park#error "Neoverse Demeter supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22*54fd6939SJiyong Park#endif 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park /* ---------------------------------------------------- 25*54fd6939SJiyong Park * HW will do the cache maintenance while powering down 26*54fd6939SJiyong Park * ---------------------------------------------------- 27*54fd6939SJiyong Park */ 28*54fd6939SJiyong Parkfunc neoverse_demeter_core_pwr_dwn 29*54fd6939SJiyong Park /* --------------------------------------------------- 30*54fd6939SJiyong Park * Enable CPU power down bit in power control register 31*54fd6939SJiyong Park * --------------------------------------------------- 32*54fd6939SJiyong Park */ 33*54fd6939SJiyong Park mrs x0, NEOVERSE_DEMETER_CPUPWRCTLR_EL1 34*54fd6939SJiyong Park orr x0, x0, #NEOVERSE_DEMETER_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 35*54fd6939SJiyong Park msr NEOVERSE_DEMETER_CPUPWRCTLR_EL1, x0 36*54fd6939SJiyong Park isb 37*54fd6939SJiyong Park ret 38*54fd6939SJiyong Parkendfunc neoverse_demeter_core_pwr_dwn 39*54fd6939SJiyong Park 40*54fd6939SJiyong Park#if REPORT_ERRATA 41*54fd6939SJiyong Park/* 42*54fd6939SJiyong Park * Errata printing function for Neoverse Demeter. Must follow AAPCS. 43*54fd6939SJiyong Park */ 44*54fd6939SJiyong Parkfunc neoverse_demeter_errata_report 45*54fd6939SJiyong Park ret 46*54fd6939SJiyong Parkendfunc neoverse_demeter_errata_report 47*54fd6939SJiyong Park#endif 48*54fd6939SJiyong Park 49*54fd6939SJiyong Parkfunc neoverse_demeter_reset_func 50*54fd6939SJiyong Park /* Disable speculative loads */ 51*54fd6939SJiyong Park msr SSBS, xzr 52*54fd6939SJiyong Park isb 53*54fd6939SJiyong Park ret 54*54fd6939SJiyong Parkendfunc neoverse_demeter_reset_func 55*54fd6939SJiyong Park 56*54fd6939SJiyong Park /* --------------------------------------------- 57*54fd6939SJiyong Park * This function provides Neoverse Demeter- 58*54fd6939SJiyong Park * specific register information for crash 59*54fd6939SJiyong Park * reporting. It needs to return with x6 60*54fd6939SJiyong Park * pointing to a list of register names in ascii 61*54fd6939SJiyong Park * and x8 - x15 having values of registers to be 62*54fd6939SJiyong Park * reported. 63*54fd6939SJiyong Park * --------------------------------------------- 64*54fd6939SJiyong Park */ 65*54fd6939SJiyong Park.section .rodata.neoverse_demeter_regs, "aS" 66*54fd6939SJiyong Parkneoverse_demeter_regs: /* The ascii list of register names to be reported */ 67*54fd6939SJiyong Park .asciz "cpuectlr_el1", "" 68*54fd6939SJiyong Park 69*54fd6939SJiyong Parkfunc neoverse_demeter_cpu_reg_dump 70*54fd6939SJiyong Park adr x6, neoverse_demeter_regs 71*54fd6939SJiyong Park mrs x8, NEOVERSE_DEMETER_CPUECTLR_EL1 72*54fd6939SJiyong Park ret 73*54fd6939SJiyong Parkendfunc neoverse_demeter_cpu_reg_dump 74*54fd6939SJiyong Park 75*54fd6939SJiyong Parkdeclare_cpu_ops neoverse_demeter, NEOVERSE_DEMETER_MIDR, \ 76*54fd6939SJiyong Park neoverse_demeter_reset_func, \ 77*54fd6939SJiyong Park neoverse_demeter_core_pwr_dwn 78