1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2021, Arm Limited. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #ifndef MPMM_H 8*54fd6939SJiyong Park #define MPMM_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include <stdbool.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park #include <platform_def.h> 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park /* 15*54fd6939SJiyong Park * Enable the Maximum Power Mitigation Mechanism. 16*54fd6939SJiyong Park * 17*54fd6939SJiyong Park * This function will enable MPMM for the current core. The AMU counters 18*54fd6939SJiyong Park * representing the MPMM gears must have been configured and enabled prior to 19*54fd6939SJiyong Park * calling this function. 20*54fd6939SJiyong Park */ 21*54fd6939SJiyong Park void mpmm_enable(void); 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park /* 24*54fd6939SJiyong Park * MPMM core data. 25*54fd6939SJiyong Park * 26*54fd6939SJiyong Park * This structure represents per-core data retrieved from the hardware 27*54fd6939SJiyong Park * configuration device tree. 28*54fd6939SJiyong Park */ 29*54fd6939SJiyong Park struct mpmm_core { 30*54fd6939SJiyong Park /* 31*54fd6939SJiyong Park * Whether MPMM is supported. 32*54fd6939SJiyong Park * 33*54fd6939SJiyong Park * Cores with support for MPMM offer one or more auxiliary AMU counters 34*54fd6939SJiyong Park * representing MPMM gears. 35*54fd6939SJiyong Park */ 36*54fd6939SJiyong Park bool supported; 37*54fd6939SJiyong Park }; 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park /* 40*54fd6939SJiyong Park * MPMM topology. 41*54fd6939SJiyong Park * 42*54fd6939SJiyong Park * This topology structure describes the system-wide representation of the 43*54fd6939SJiyong Park * information retrieved from the hardware configuration device tree. 44*54fd6939SJiyong Park */ 45*54fd6939SJiyong Park struct mpmm_topology { 46*54fd6939SJiyong Park struct mpmm_core cores[PLATFORM_CORE_COUNT]; /* Per-core data */ 47*54fd6939SJiyong Park }; 48*54fd6939SJiyong Park 49*54fd6939SJiyong Park #if !ENABLE_MPMM_FCONF 50*54fd6939SJiyong Park /* 51*54fd6939SJiyong Park * Retrieve the platform's MPMM topology. A `NULL` return value is treated as a 52*54fd6939SJiyong Park * non-fatal error, in which case MPMM will not be enabled for any core. 53*54fd6939SJiyong Park */ 54*54fd6939SJiyong Park const struct mpmm_topology *plat_mpmm_topology(void); 55*54fd6939SJiyong Park #endif /* ENABLE_MPMM_FCONF */ 56*54fd6939SJiyong Park 57*54fd6939SJiyong Park #endif /* MPMM_H */ 58