xref: /aosp_15_r20/external/arm-trusted-firmware/include/dt-bindings/soc/stm32mp15-tzc400.h (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
2*54fd6939SJiyong Park /*
3*54fd6939SJiyong Park  * Copyright (C) 2021, STMicroelectronics - All Rights Reserved
4*54fd6939SJiyong Park  */
5*54fd6939SJiyong Park 
6*54fd6939SJiyong Park #ifndef _DT_BINDINGS_STM32MP15_TZC400_H
7*54fd6939SJiyong Park #define _DT_BINDINGS_STM32MP15_TZC400_H
8*54fd6939SJiyong Park 
9*54fd6939SJiyong Park #include <drivers/arm/tzc_common.h>
10*54fd6939SJiyong Park 
11*54fd6939SJiyong Park #define STM32MP1_TZC_A7_ID		U(0)
12*54fd6939SJiyong Park #define STM32MP1_TZC_M4_ID		U(1)
13*54fd6939SJiyong Park #define STM32MP1_TZC_LCD_ID		U(3)
14*54fd6939SJiyong Park #define STM32MP1_TZC_GPU_ID		U(4)
15*54fd6939SJiyong Park #define STM32MP1_TZC_MDMA_ID		U(5)
16*54fd6939SJiyong Park #define STM32MP1_TZC_DMA_ID		U(6)
17*54fd6939SJiyong Park #define STM32MP1_TZC_USB_HOST_ID	U(7)
18*54fd6939SJiyong Park #define STM32MP1_TZC_USB_OTG_ID		U(8)
19*54fd6939SJiyong Park #define STM32MP1_TZC_SDMMC_ID		U(9)
20*54fd6939SJiyong Park #define STM32MP1_TZC_ETH_ID		U(10)
21*54fd6939SJiyong Park #define STM32MP1_TZC_DAP_ID		U(15)
22*54fd6939SJiyong Park 
23*54fd6939SJiyong Park #define TZC_REGION_NSEC_ALL_ACCESS_RDWR \
24*54fd6939SJiyong Park 	(TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_A7_ID) | \
25*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_GPU_ID) | \
26*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_LCD_ID) | \
27*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_MDMA_ID) | \
28*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_M4_ID) | \
29*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DMA_ID) | \
30*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_HOST_ID) | \
31*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_OTG_ID) | \
32*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID) | \
33*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_ETH_ID) | \
34*54fd6939SJiyong Park 	 TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DAP_ID))
35*54fd6939SJiyong Park 
36*54fd6939SJiyong Park #endif /* _DT_BINDINGS_STM32MP15_TZC400_H */
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