1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #ifndef STM32_SDMMC2_H 8*54fd6939SJiyong Park #define STM32_SDMMC2_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include <stdbool.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park #include <drivers/mmc.h> 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park struct stm32_sdmmc2_params { 15*54fd6939SJiyong Park uintptr_t reg_base; 16*54fd6939SJiyong Park unsigned int clk_rate; 17*54fd6939SJiyong Park unsigned int bus_width; 18*54fd6939SJiyong Park unsigned int flags; 19*54fd6939SJiyong Park struct mmc_device_info *device_info; 20*54fd6939SJiyong Park unsigned int pin_ckin; 21*54fd6939SJiyong Park unsigned int negedge; 22*54fd6939SJiyong Park unsigned int dirpol; 23*54fd6939SJiyong Park unsigned int clock_id; 24*54fd6939SJiyong Park unsigned int reset_id; 25*54fd6939SJiyong Park unsigned int max_freq; 26*54fd6939SJiyong Park bool use_dma; 27*54fd6939SJiyong Park }; 28*54fd6939SJiyong Park 29*54fd6939SJiyong Park unsigned long long stm32_sdmmc2_mmc_get_device_size(void); 30*54fd6939SJiyong Park int stm32_sdmmc2_mmc_init(struct stm32_sdmmc2_params *params); 31*54fd6939SJiyong Park bool plat_sdmmc2_use_dma(unsigned int instance, unsigned int memory); 32*54fd6939SJiyong Park 33*54fd6939SJiyong Park #endif /* STM32_SDMMC2_H */ 34