1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright 2021 NXP 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park * 6*54fd6939SJiyong Park */ 7*54fd6939SJiyong Park 8*54fd6939SJiyong Park #ifndef SFP_H 9*54fd6939SJiyong Park #define SFP_H 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park #include <endian.h> 12*54fd6939SJiyong Park #include <lib/mmio.h> 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park /* SFP Configuration Register Offsets */ 15*54fd6939SJiyong Park #define SFP_INGR_OFFSET U(0x20) 16*54fd6939SJiyong Park #define SFP_SVHESR_OFFSET U(0x24) 17*54fd6939SJiyong Park #define SFP_SFPCR_OFFSET U(0x28) 18*54fd6939SJiyong Park #define SFP_VER_OFFSET U(0x38) 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park /* SFP Hamming register masks for OTPMK and DRV */ 21*54fd6939SJiyong Park #define SFP_SVHESR_DRV_MASK U(0x7F) 22*54fd6939SJiyong Park #define SFP_SVHESR_OTPMK_MASK U(0x7FC00) 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park /* SFP commands */ 25*54fd6939SJiyong Park #define SFP_INGR_READFB_CMD U(0x1) 26*54fd6939SJiyong Park #define SFP_INGR_PROGFB_CMD U(0x2) 27*54fd6939SJiyong Park #define SFP_INGR_ERROR_MASK U(0x100) 28*54fd6939SJiyong Park 29*54fd6939SJiyong Park /* SFPCR Masks */ 30*54fd6939SJiyong Park #define SFP_SFPCR_WD U(0x80000000) 31*54fd6939SJiyong Park #define SFP_SFPCR_WDL U(0x40000000) 32*54fd6939SJiyong Park 33*54fd6939SJiyong Park /* SFPCR Masks */ 34*54fd6939SJiyong Park #define SFP_SFPCR_WD U(0x80000000) 35*54fd6939SJiyong Park #define SFP_SFPCR_WDL U(0x40000000) 36*54fd6939SJiyong Park 37*54fd6939SJiyong Park #define SFP_FUSE_REGS_OFFSET U(0x200) 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park #ifdef NXP_SFP_VER_3_4 40*54fd6939SJiyong Park #define OSPR0_SC_MASK U(0xC000FE35) 41*54fd6939SJiyong Park #elif defined(NXP_SFP_VER_3_2) 42*54fd6939SJiyong Park #define OSPR0_SC_MASK U(0x0000E035) 43*54fd6939SJiyong Park #endif 44*54fd6939SJiyong Park 45*54fd6939SJiyong Park #if defined(NXP_SFP_VER_3_4) 46*54fd6939SJiyong Park #define OSPR_KEY_REVOC_SHIFT U(9) 47*54fd6939SJiyong Park #define OSPR_KEY_REVOC_MASK U(0x0000fe00) 48*54fd6939SJiyong Park #elif defined(NXP_SFP_VER_3_2) 49*54fd6939SJiyong Park #define OSPR_KEY_REVOC_SHIFT U(13) 50*54fd6939SJiyong Park #define OSPR_KEY_REVOC_MASK U(0x0000e000) 51*54fd6939SJiyong Park #endif /* NXP_SFP_VER_3_4 */ 52*54fd6939SJiyong Park 53*54fd6939SJiyong Park #define OSPR1_MC_MASK U(0xFFFF0000) 54*54fd6939SJiyong Park #define OSPR1_DBG_LVL_MASK U(0x00000007) 55*54fd6939SJiyong Park 56*54fd6939SJiyong Park #define OSPR_ITS_MASK U(0x00000004) 57*54fd6939SJiyong Park #define OSPR_WP_MASK U(0x00000001) 58*54fd6939SJiyong Park 59*54fd6939SJiyong Park #define MAX_OEM_UID U(5) 60*54fd6939SJiyong Park #define SRK_HASH_SIZE U(32) 61*54fd6939SJiyong Park 62*54fd6939SJiyong Park /* SFP CCSR Register Map */ 63*54fd6939SJiyong Park struct sfp_ccsr_regs_t { 64*54fd6939SJiyong Park uint32_t ospr; /* 0x200 OSPR0 */ 65*54fd6939SJiyong Park uint32_t ospr1; /* 0x204 OSPR1 */ 66*54fd6939SJiyong Park uint32_t dcv[2]; /* 0x208 Debug Challenge Value */ 67*54fd6939SJiyong Park uint32_t drv[2]; /* 0x210 Debug Response Value */ 68*54fd6939SJiyong Park uint32_t fswpr; /* 0x218 FSL Section Write Protect */ 69*54fd6939SJiyong Park uint32_t fsl_uid[2]; /* 0x21c FSL UID 0 */ 70*54fd6939SJiyong Park uint32_t isbcr; /* 0x224 ISBC Configuration */ 71*54fd6939SJiyong Park uint32_t fsspr[3]; /* 0x228 FSL Scratch Pad */ 72*54fd6939SJiyong Park uint32_t otpmk[8]; /* 0x234 OTPMK */ 73*54fd6939SJiyong Park uint32_t srk_hash[SRK_HASH_SIZE/sizeof(uint32_t)]; 74*54fd6939SJiyong Park /* 0x254 Super Root Key Hash */ 75*54fd6939SJiyong Park uint32_t oem_uid[MAX_OEM_UID]; /* 0x274 OEM UID 0 */ 76*54fd6939SJiyong Park }; 77*54fd6939SJiyong Park 78*54fd6939SJiyong Park uintptr_t get_sfp_addr(void); 79*54fd6939SJiyong Park void sfp_init(uintptr_t nxp_sfp_addr); 80*54fd6939SJiyong Park uint32_t *get_sfp_srk_hash(void); 81*54fd6939SJiyong Park int sfp_check_its(void); 82*54fd6939SJiyong Park int sfp_check_oem_wp(void); 83*54fd6939SJiyong Park uint32_t get_key_revoc(void); 84*54fd6939SJiyong Park void set_sfp_wr_disable(void); 85*54fd6939SJiyong Park int sfp_program_fuses(void); 86*54fd6939SJiyong Park 87*54fd6939SJiyong Park uint32_t sfp_read_oem_uid(uint8_t oem_uid); 88*54fd6939SJiyong Park uint32_t sfp_write_oem_uid(uint8_t oem_uid, uint32_t sfp_val); 89*54fd6939SJiyong Park 90*54fd6939SJiyong Park #ifdef NXP_SFP_BE 91*54fd6939SJiyong Park #define sfp_read32(a) bswap32(mmio_read_32((uintptr_t)(a))) 92*54fd6939SJiyong Park #define sfp_write32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) 93*54fd6939SJiyong Park #elif defined(NXP_SFP_LE) 94*54fd6939SJiyong Park #define sfp_read32(a) mmio_read_32((uintptr_t)(a)) 95*54fd6939SJiyong Park #define sfp_write32(a, v) mmio_write_32((uintptr_t)(a), (v)) 96*54fd6939SJiyong Park #else 97*54fd6939SJiyong Park #error Please define CCSR SFP register endianness 98*54fd6939SJiyong Park #endif 99*54fd6939SJiyong Park 100*54fd6939SJiyong Park #endif/* SFP_H */ 101