1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (C) 2017 Marvell International Ltd. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park * https://spdx.org/licenses 6*54fd6939SJiyong Park */ 7*54fd6939SJiyong Park #ifndef ARO_H 8*54fd6939SJiyong Park #define ARO_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park enum hws_freq { 11*54fd6939SJiyong Park CPU_FREQ_2000, 12*54fd6939SJiyong Park CPU_FREQ_1800, 13*54fd6939SJiyong Park CPU_FREQ_1600, 14*54fd6939SJiyong Park CPU_FREQ_1400, 15*54fd6939SJiyong Park CPU_FREQ_1300, 16*54fd6939SJiyong Park CPU_FREQ_1200, 17*54fd6939SJiyong Park CPU_FREQ_1000, 18*54fd6939SJiyong Park CPU_FREQ_600, 19*54fd6939SJiyong Park CPU_FREQ_800, 20*54fd6939SJiyong Park DDR_FREQ_LAST, 21*54fd6939SJiyong Park DDR_FREQ_SAR 22*54fd6939SJiyong Park }; 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park #include <mvebu_def.h> 25*54fd6939SJiyong Park 26*54fd6939SJiyong Park enum cpu_clock_freq_mode { 27*54fd6939SJiyong Park CPU_2000_DDR_1200_RCLK_1200 = 0x0, 28*54fd6939SJiyong Park CPU_2000_DDR_1050_RCLK_1050 = 0x1, 29*54fd6939SJiyong Park CPU_1600_DDR_800_RCLK_800 = 0x4, 30*54fd6939SJiyong Park CPU_2200_DDR_1200_RCLK_1200 = 0x6, 31*54fd6939SJiyong Park CPU_1800_DDR_1050_RCLK_1050 = 0x7, 32*54fd6939SJiyong Park CPU_1600_DDR_900_RCLK_900 = 0x0B, 33*54fd6939SJiyong Park CPU_1600_DDR_1050_RCLK_1050 = 0x0D, 34*54fd6939SJiyong Park CPU_1600_DDR_1200_RCLK_1200 = 0x0D, 35*54fd6939SJiyong Park CPU_1600_DDR_900_RCLK_900_2 = 0x0E, 36*54fd6939SJiyong Park CPU_1000_DDR_650_RCLK_650 = 0x13, 37*54fd6939SJiyong Park CPU_1300_DDR_800_RCLK_800 = 0x14, 38*54fd6939SJiyong Park CPU_1300_DDR_650_RCLK_650 = 0x17, 39*54fd6939SJiyong Park CPU_1200_DDR_800_RCLK_800 = 0x19, 40*54fd6939SJiyong Park CPU_1400_DDR_800_RCLK_800 = 0x1a, 41*54fd6939SJiyong Park CPU_600_DDR_800_RCLK_800 = 0x1B, 42*54fd6939SJiyong Park CPU_800_DDR_800_RCLK_800 = 0x1C, 43*54fd6939SJiyong Park CPU_1000_DDR_800_RCLK_800 = 0x1D, 44*54fd6939SJiyong Park CPU_DDR_RCLK_INVALID 45*54fd6939SJiyong Park }; 46*54fd6939SJiyong Park 47*54fd6939SJiyong Park int init_aro(void); 48*54fd6939SJiyong Park 49*54fd6939SJiyong Park #endif /* ARO_H */ 50