xref: /aosp_15_r20/external/arm-trusted-firmware/include/drivers/arm/tzc400.h (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park 
7*54fd6939SJiyong Park #ifndef TZC400_H
8*54fd6939SJiyong Park #define TZC400_H
9*54fd6939SJiyong Park 
10*54fd6939SJiyong Park #include <drivers/arm/tzc_common.h>
11*54fd6939SJiyong Park #include <lib/utils_def.h>
12*54fd6939SJiyong Park 
13*54fd6939SJiyong Park #define BUILD_CONFIG_OFF			U(0x000)
14*54fd6939SJiyong Park #define GATE_KEEPER_OFF				U(0x008)
15*54fd6939SJiyong Park #define SPECULATION_CTRL_OFF			U(0x00c)
16*54fd6939SJiyong Park #define INT_STATUS				U(0x010)
17*54fd6939SJiyong Park #define INT_CLEAR				U(0x014)
18*54fd6939SJiyong Park 
19*54fd6939SJiyong Park #define FAIL_ADDRESS_LOW_OFF			U(0x020)
20*54fd6939SJiyong Park #define FAIL_ADDRESS_HIGH_OFF			U(0x024)
21*54fd6939SJiyong Park #define FAIL_CONTROL_OFF			U(0x028)
22*54fd6939SJiyong Park #define FAIL_ID					U(0x02c)
23*54fd6939SJiyong Park 
24*54fd6939SJiyong Park /* ID registers not common across different varieties of TZC */
25*54fd6939SJiyong Park #define PID5					U(0xFD4)
26*54fd6939SJiyong Park #define PID6					U(0xFD8)
27*54fd6939SJiyong Park #define PID7					U(0xFDC)
28*54fd6939SJiyong Park 
29*54fd6939SJiyong Park #define BUILD_CONFIG_NF_SHIFT			24
30*54fd6939SJiyong Park #define BUILD_CONFIG_NF_MASK			U(0x3)
31*54fd6939SJiyong Park #define BUILD_CONFIG_AW_SHIFT			8
32*54fd6939SJiyong Park #define BUILD_CONFIG_AW_MASK			U(0x3f)
33*54fd6939SJiyong Park #define BUILD_CONFIG_NR_SHIFT			0
34*54fd6939SJiyong Park #define BUILD_CONFIG_NR_MASK			U(0x1f)
35*54fd6939SJiyong Park 
36*54fd6939SJiyong Park /*
37*54fd6939SJiyong Park  * Number of gate keepers is implementation defined. But we know the max for
38*54fd6939SJiyong Park  * this device is 4. Get implementation details from BUILD_CONFIG.
39*54fd6939SJiyong Park  */
40*54fd6939SJiyong Park #define GATE_KEEPER_OS_SHIFT			16
41*54fd6939SJiyong Park #define GATE_KEEPER_OS_MASK			U(0xf)
42*54fd6939SJiyong Park #define GATE_KEEPER_OR_SHIFT			0
43*54fd6939SJiyong Park #define GATE_KEEPER_OR_MASK			U(0xf)
44*54fd6939SJiyong Park #define GATE_KEEPER_FILTER_MASK			U(0x1)
45*54fd6939SJiyong Park 
46*54fd6939SJiyong Park /* Speculation is enabled by default. */
47*54fd6939SJiyong Park #define SPECULATION_CTRL_WRITE_DISABLE		BIT_32(1)
48*54fd6939SJiyong Park #define SPECULATION_CTRL_READ_DISABLE		BIT_32(0)
49*54fd6939SJiyong Park 
50*54fd6939SJiyong Park /* Max number of filters allowed is 4. */
51*54fd6939SJiyong Park #define INT_STATUS_OVERLAP_SHIFT		16
52*54fd6939SJiyong Park #define INT_STATUS_OVERLAP_MASK			U(0xf)
53*54fd6939SJiyong Park #define INT_STATUS_OVERRUN_SHIFT		8
54*54fd6939SJiyong Park #define INT_STATUS_OVERRUN_MASK			U(0xf)
55*54fd6939SJiyong Park #define INT_STATUS_STATUS_SHIFT			0
56*54fd6939SJiyong Park #define INT_STATUS_STATUS_MASK			U(0xf)
57*54fd6939SJiyong Park 
58*54fd6939SJiyong Park #define INT_CLEAR_CLEAR_SHIFT			0
59*54fd6939SJiyong Park #define INT_CLEAR_CLEAR_MASK			U(0xf)
60*54fd6939SJiyong Park 
61*54fd6939SJiyong Park #define FAIL_CONTROL_DIR_SHIFT			24
62*54fd6939SJiyong Park #define FAIL_CONTROL_DIR_READ			U(0)
63*54fd6939SJiyong Park #define FAIL_CONTROL_DIR_WRITE			U(1)
64*54fd6939SJiyong Park #define FAIL_CONTROL_NS_SHIFT			21
65*54fd6939SJiyong Park #define FAIL_CONTROL_NS_SECURE			U(0)
66*54fd6939SJiyong Park #define FAIL_CONTROL_NS_NONSECURE		U(1)
67*54fd6939SJiyong Park #define FAIL_CONTROL_PRIV_SHIFT			20
68*54fd6939SJiyong Park #define FAIL_CONTROL_PRIV_UNPRIV		U(0)
69*54fd6939SJiyong Park #define FAIL_CONTROL_PRIV_PRIV			U(1)
70*54fd6939SJiyong Park 
71*54fd6939SJiyong Park /*
72*54fd6939SJiyong Park  * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.
73*54fd6939SJiyong Park  * Platform should provide the value on initialisation.
74*54fd6939SJiyong Park  */
75*54fd6939SJiyong Park #define FAIL_ID_VNET_SHIFT			24
76*54fd6939SJiyong Park #define FAIL_ID_VNET_MASK			U(0xf)
77*54fd6939SJiyong Park #define FAIL_ID_ID_SHIFT			0
78*54fd6939SJiyong Park 
79*54fd6939SJiyong Park #define TZC_400_PERIPHERAL_ID			U(0x460)
80*54fd6939SJiyong Park 
81*54fd6939SJiyong Park /* Filter enable bits in a TZC */
82*54fd6939SJiyong Park #define TZC_400_REGION_ATTR_F_EN_MASK		U(0xf)
83*54fd6939SJiyong Park #define TZC_400_REGION_ATTR_FILTER_BIT(x)	(U(1) << (x))
84*54fd6939SJiyong Park #define TZC_400_REGION_ATTR_FILTER_BIT_ALL	TZC_400_REGION_ATTR_F_EN_MASK
85*54fd6939SJiyong Park 
86*54fd6939SJiyong Park /*
87*54fd6939SJiyong Park  * All TZC region configuration registers are placed one after another. It
88*54fd6939SJiyong Park  * depicts size of block of registers for programming each region.
89*54fd6939SJiyong Park  */
90*54fd6939SJiyong Park #define TZC_400_REGION_SIZE			U(0x20)
91*54fd6939SJiyong Park #define TZC_400_ACTION_OFF			U(0x4)
92*54fd6939SJiyong Park 
93*54fd6939SJiyong Park #define FILTER_OFFSET				U(0x10)
94*54fd6939SJiyong Park 
95*54fd6939SJiyong Park #ifndef __ASSEMBLER__
96*54fd6939SJiyong Park 
97*54fd6939SJiyong Park #include <cdefs.h>
98*54fd6939SJiyong Park #include <stdint.h>
99*54fd6939SJiyong Park 
100*54fd6939SJiyong Park /*******************************************************************************
101*54fd6939SJiyong Park  * Function & variable prototypes
102*54fd6939SJiyong Park  ******************************************************************************/
103*54fd6939SJiyong Park void tzc400_init(uintptr_t base);
104*54fd6939SJiyong Park void tzc400_configure_region0(unsigned int sec_attr,
105*54fd6939SJiyong Park 			   unsigned int ns_device_access);
106*54fd6939SJiyong Park void tzc400_configure_region(unsigned int filters,
107*54fd6939SJiyong Park 			  unsigned int region,
108*54fd6939SJiyong Park 			  unsigned long long region_base,
109*54fd6939SJiyong Park 			  unsigned long long region_top,
110*54fd6939SJiyong Park 			  unsigned int sec_attr,
111*54fd6939SJiyong Park 			  unsigned int nsaid_permissions);
112*54fd6939SJiyong Park void tzc400_update_filters(unsigned int region, unsigned int filters);
113*54fd6939SJiyong Park void tzc400_set_action(unsigned int action);
114*54fd6939SJiyong Park void tzc400_enable_filters(void);
115*54fd6939SJiyong Park void tzc400_disable_filters(void);
116*54fd6939SJiyong Park int tzc400_it_handler(void);
117*54fd6939SJiyong Park 
tzc_init(uintptr_t base)118*54fd6939SJiyong Park static inline void tzc_init(uintptr_t base)
119*54fd6939SJiyong Park {
120*54fd6939SJiyong Park 	tzc400_init(base);
121*54fd6939SJiyong Park }
122*54fd6939SJiyong Park 
tzc_configure_region0(unsigned int sec_attr,unsigned int ns_device_access)123*54fd6939SJiyong Park static inline void tzc_configure_region0(
124*54fd6939SJiyong Park 			unsigned int sec_attr,
125*54fd6939SJiyong Park 			unsigned int ns_device_access)
126*54fd6939SJiyong Park {
127*54fd6939SJiyong Park 	tzc400_configure_region0(sec_attr, ns_device_access);
128*54fd6939SJiyong Park }
129*54fd6939SJiyong Park 
tzc_configure_region(unsigned int filters,unsigned int region,unsigned long long region_base,unsigned long long region_top,unsigned int sec_attr,unsigned int ns_device_access)130*54fd6939SJiyong Park static inline void tzc_configure_region(
131*54fd6939SJiyong Park 			  unsigned int filters,
132*54fd6939SJiyong Park 			  unsigned int region,
133*54fd6939SJiyong Park 			  unsigned long long region_base,
134*54fd6939SJiyong Park 			  unsigned long long region_top,
135*54fd6939SJiyong Park 			  unsigned int sec_attr,
136*54fd6939SJiyong Park 			  unsigned int ns_device_access)
137*54fd6939SJiyong Park {
138*54fd6939SJiyong Park 	tzc400_configure_region(filters, region, region_base,
139*54fd6939SJiyong Park 			region_top, sec_attr, ns_device_access);
140*54fd6939SJiyong Park }
141*54fd6939SJiyong Park 
tzc_set_action(unsigned int action)142*54fd6939SJiyong Park static inline void tzc_set_action(unsigned int action)
143*54fd6939SJiyong Park {
144*54fd6939SJiyong Park 	tzc400_set_action(action);
145*54fd6939SJiyong Park }
146*54fd6939SJiyong Park 
147*54fd6939SJiyong Park 
tzc_enable_filters(void)148*54fd6939SJiyong Park static inline void tzc_enable_filters(void)
149*54fd6939SJiyong Park {
150*54fd6939SJiyong Park 	tzc400_enable_filters();
151*54fd6939SJiyong Park }
152*54fd6939SJiyong Park 
tzc_disable_filters(void)153*54fd6939SJiyong Park static inline void tzc_disable_filters(void)
154*54fd6939SJiyong Park {
155*54fd6939SJiyong Park 	tzc400_disable_filters();
156*54fd6939SJiyong Park }
157*54fd6939SJiyong Park 
158*54fd6939SJiyong Park #endif /* __ASSEMBLER__ */
159*54fd6939SJiyong Park 
160*54fd6939SJiyong Park #endif /* TZC400_H */
161