xref: /aosp_15_r20/external/arm-trusted-firmware/drivers/scmi-msg/reset_domain.h (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /* SPDX-License-Identifier: BSD-3-Clause */
2*54fd6939SJiyong Park /*
3*54fd6939SJiyong Park  * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
4*54fd6939SJiyong Park  * Copyright (c) 2019, Linaro Limited
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park #ifndef SCMI_MSG_RESET_DOMAIN_H
7*54fd6939SJiyong Park #define SCMI_MSG_RESET_DOMAIN_H
8*54fd6939SJiyong Park 
9*54fd6939SJiyong Park #include <stdbool.h>
10*54fd6939SJiyong Park #include <stdint.h>
11*54fd6939SJiyong Park 
12*54fd6939SJiyong Park #include <lib/utils_def.h>
13*54fd6939SJiyong Park 
14*54fd6939SJiyong Park #define SCMI_PROTOCOL_VERSION_RESET_DOMAIN	0x10000U
15*54fd6939SJiyong Park 
16*54fd6939SJiyong Park #define SCMI_RESET_STATE_ARCH			BIT(31)
17*54fd6939SJiyong Park #define SCMI_RESET_STATE_IMPL			0U
18*54fd6939SJiyong Park 
19*54fd6939SJiyong Park /*
20*54fd6939SJiyong Park  * Identifiers of the SCMI Reset Domain Management Protocol commands
21*54fd6939SJiyong Park  */
22*54fd6939SJiyong Park enum scmi_reset_domain_command_id {
23*54fd6939SJiyong Park 	SCMI_RESET_DOMAIN_ATTRIBUTES = 0x03,
24*54fd6939SJiyong Park 	SCMI_RESET_DOMAIN_REQUEST = 0x04,
25*54fd6939SJiyong Park 	SCMI_RESET_DOMAIN_NOTIFY = 0x05,
26*54fd6939SJiyong Park };
27*54fd6939SJiyong Park 
28*54fd6939SJiyong Park /*
29*54fd6939SJiyong Park  * Identifiers of the SCMI Reset Domain Management Protocol responses
30*54fd6939SJiyong Park  */
31*54fd6939SJiyong Park enum scmi_reset_domain_response_id {
32*54fd6939SJiyong Park 	SCMI_RESET_ISSUED = 0x00,
33*54fd6939SJiyong Park 	SCMI_RESET_COMPLETE = 0x04,
34*54fd6939SJiyong Park };
35*54fd6939SJiyong Park 
36*54fd6939SJiyong Park /*
37*54fd6939SJiyong Park  * PROTOCOL_ATTRIBUTES
38*54fd6939SJiyong Park  */
39*54fd6939SJiyong Park 
40*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_COUNT_MASK		GENMASK_32(15, 0)
41*54fd6939SJiyong Park 
42*54fd6939SJiyong Park struct scmi_reset_domain_protocol_attributes_p2a {
43*54fd6939SJiyong Park 	int32_t status;
44*54fd6939SJiyong Park 	uint32_t attributes;
45*54fd6939SJiyong Park };
46*54fd6939SJiyong Park 
47*54fd6939SJiyong Park /* Value for scmi_reset_domain_attributes_p2a:flags */
48*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_ATTR_ASYNC		BIT(31)
49*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_ATTR_NOTIF		BIT(30)
50*54fd6939SJiyong Park 
51*54fd6939SJiyong Park /* Value for scmi_reset_domain_attributes_p2a:latency */
52*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_ATTR_UNK_LAT		0x7fffffffU
53*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_ATTR_MAX_LAT		0x7ffffffeU
54*54fd6939SJiyong Park 
55*54fd6939SJiyong Park /* Macro for scmi_reset_domain_attributes_p2a:name */
56*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_ATTR_NAME_SZ		16U
57*54fd6939SJiyong Park 
58*54fd6939SJiyong Park struct scmi_reset_domain_attributes_a2p {
59*54fd6939SJiyong Park 	uint32_t domain_id;
60*54fd6939SJiyong Park };
61*54fd6939SJiyong Park 
62*54fd6939SJiyong Park struct scmi_reset_domain_attributes_p2a {
63*54fd6939SJiyong Park 	int32_t status;
64*54fd6939SJiyong Park 	uint32_t flags;
65*54fd6939SJiyong Park 	uint32_t latency;
66*54fd6939SJiyong Park 	char name[SCMI_RESET_DOMAIN_ATTR_NAME_SZ];
67*54fd6939SJiyong Park };
68*54fd6939SJiyong Park 
69*54fd6939SJiyong Park /*
70*54fd6939SJiyong Park  * RESET
71*54fd6939SJiyong Park  */
72*54fd6939SJiyong Park 
73*54fd6939SJiyong Park /* Values for scmi_reset_domain_request_a2p:flags */
74*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_ASYNC			BIT(2)
75*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_EXPLICIT		BIT(1)
76*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_AUTO			BIT(0)
77*54fd6939SJiyong Park 
78*54fd6939SJiyong Park struct scmi_reset_domain_request_a2p {
79*54fd6939SJiyong Park 	uint32_t domain_id;
80*54fd6939SJiyong Park 	uint32_t flags;
81*54fd6939SJiyong Park 	uint32_t reset_state;
82*54fd6939SJiyong Park };
83*54fd6939SJiyong Park 
84*54fd6939SJiyong Park struct scmi_reset_domain_request_p2a {
85*54fd6939SJiyong Park 	int32_t status;
86*54fd6939SJiyong Park };
87*54fd6939SJiyong Park 
88*54fd6939SJiyong Park /*
89*54fd6939SJiyong Park  * RESET_NOTIFY
90*54fd6939SJiyong Park  */
91*54fd6939SJiyong Park 
92*54fd6939SJiyong Park /* Values for scmi_reset_notify_p2a:flags */
93*54fd6939SJiyong Park #define SCMI_RESET_DOMAIN_DO_NOTIFY		BIT(0)
94*54fd6939SJiyong Park 
95*54fd6939SJiyong Park struct scmi_reset_domain_notify_a2p {
96*54fd6939SJiyong Park 	uint32_t domain_id;
97*54fd6939SJiyong Park 	uint32_t notify_enable;
98*54fd6939SJiyong Park };
99*54fd6939SJiyong Park 
100*54fd6939SJiyong Park struct scmi_reset_domain_notify_p2a {
101*54fd6939SJiyong Park 	int32_t status;
102*54fd6939SJiyong Park };
103*54fd6939SJiyong Park 
104*54fd6939SJiyong Park /*
105*54fd6939SJiyong Park  * RESET_COMPLETE
106*54fd6939SJiyong Park  */
107*54fd6939SJiyong Park 
108*54fd6939SJiyong Park struct scmi_reset_domain_complete_p2a {
109*54fd6939SJiyong Park 	int32_t status;
110*54fd6939SJiyong Park 	uint32_t domain_id;
111*54fd6939SJiyong Park };
112*54fd6939SJiyong Park 
113*54fd6939SJiyong Park /*
114*54fd6939SJiyong Park  * RESET_ISSUED
115*54fd6939SJiyong Park  */
116*54fd6939SJiyong Park 
117*54fd6939SJiyong Park struct scmi_reset_domain_issued_p2a {
118*54fd6939SJiyong Park 	uint32_t domain_id;
119*54fd6939SJiyong Park 	uint32_t reset_state;
120*54fd6939SJiyong Park };
121*54fd6939SJiyong Park 
122*54fd6939SJiyong Park #endif /* SCMI_MSG_RESET_DOMAIN_H */
123