1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park * Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved.
3*54fd6939SJiyong Park *
4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park */
6*54fd6939SJiyong Park
7*54fd6939SJiyong Park #include <lib/mmio.h>
8*54fd6939SJiyong Park
9*54fd6939SJiyong Park #include "cpg_registers.h"
10*54fd6939SJiyong Park #include "rcar_private.h"
11*54fd6939SJiyong Park
12*54fd6939SJiyong Park #if IMAGE_BL31
cpg_write(uintptr_t regadr,uint32_t regval)13*54fd6939SJiyong Park void __attribute__ ((section(".system_ram"))) cpg_write(uintptr_t regadr, uint32_t regval)
14*54fd6939SJiyong Park #else
15*54fd6939SJiyong Park void cpg_write(uintptr_t regadr, uint32_t regval)
16*54fd6939SJiyong Park #endif
17*54fd6939SJiyong Park {
18*54fd6939SJiyong Park uint32_t value = regval;
19*54fd6939SJiyong Park
20*54fd6939SJiyong Park mmio_write_32(CPG_CPGWPR, ~value);
21*54fd6939SJiyong Park mmio_write_32(regadr, value);
22*54fd6939SJiyong Park }
23*54fd6939SJiyong Park
24*54fd6939SJiyong Park #if IMAGE_BL31
mstpcr_write(uint32_t mstpcr,uint32_t mstpsr,uint32_t target_bit)25*54fd6939SJiyong Park void __attribute__ ((section(".system_ram"))) mstpcr_write(uint32_t mstpcr, uint32_t mstpsr,
26*54fd6939SJiyong Park uint32_t target_bit)
27*54fd6939SJiyong Park #else
28*54fd6939SJiyong Park void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit)
29*54fd6939SJiyong Park #endif
30*54fd6939SJiyong Park {
31*54fd6939SJiyong Park uint32_t reg;
32*54fd6939SJiyong Park
33*54fd6939SJiyong Park reg = mmio_read_32(mstpcr);
34*54fd6939SJiyong Park reg &= ~target_bit;
35*54fd6939SJiyong Park cpg_write(mstpcr, reg);
36*54fd6939SJiyong Park while ((mmio_read_32(mstpsr) & target_bit) != 0U) {
37*54fd6939SJiyong Park }
38*54fd6939SJiyong Park }
39