1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright 2021 NXP 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park * 6*54fd6939SJiyong Park */ 7*54fd6939SJiyong Park 8*54fd6939SJiyong Park #include <arch.h> 9*54fd6939SJiyong Park #include <arch_helpers.h> 10*54fd6939SJiyong Park #include <common/debug.h> 11*54fd6939SJiyong Park #include <dcfg.h> 12*54fd6939SJiyong Park #include <lib/mmio.h> 13*54fd6939SJiyong Park #include <pmu.h> 14*54fd6939SJiyong Park enable_timer_base_to_cluster(uintptr_t nxp_pmu_addr)15*54fd6939SJiyong Parkvoid enable_timer_base_to_cluster(uintptr_t nxp_pmu_addr) 16*54fd6939SJiyong Park { 17*54fd6939SJiyong Park uint32_t *cltbenr = NULL; 18*54fd6939SJiyong Park uint32_t cltbenr_val = 0U; 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park cltbenr = (uint32_t *)(nxp_pmu_addr 21*54fd6939SJiyong Park + CLUST_TIMER_BASE_ENBL_OFFSET); 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park cltbenr_val = mmio_read_32((uintptr_t)cltbenr); 24*54fd6939SJiyong Park 25*54fd6939SJiyong Park cltbenr_val = cltbenr_val 26*54fd6939SJiyong Park | (1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 27*54fd6939SJiyong Park 28*54fd6939SJiyong Park mmio_write_32((uintptr_t)cltbenr, cltbenr_val); 29*54fd6939SJiyong Park 30*54fd6939SJiyong Park VERBOSE("Enable cluster time base\n"); 31*54fd6939SJiyong Park } 32*54fd6939SJiyong Park 33*54fd6939SJiyong Park /* 34*54fd6939SJiyong Park * Enable core timebase. In certain Layerscape SoCs, the clock for each core's 35*54fd6939SJiyong Park * has an enable bit in the PMU Physical Core Time Base Enable 36*54fd6939SJiyong Park * Register (PCTBENR), which allows the watchdog to operate. 37*54fd6939SJiyong Park */ 38*54fd6939SJiyong Park enable_core_tb(uintptr_t nxp_pmu_addr)39*54fd6939SJiyong Parkvoid enable_core_tb(uintptr_t nxp_pmu_addr) 40*54fd6939SJiyong Park { 41*54fd6939SJiyong Park uint32_t *pctbenr = (uint32_t *) (nxp_pmu_addr + 42*54fd6939SJiyong Park CORE_TIMEBASE_ENBL_OFFSET); 43*54fd6939SJiyong Park 44*54fd6939SJiyong Park mmio_write_32((uintptr_t)pctbenr, 0xff); 45*54fd6939SJiyong Park } 46