1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright 2020 NXP 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park * 6*54fd6939SJiyong Park */ 7*54fd6939SJiyong Park 8*54fd6939SJiyong Park #include <arch.h> 9*54fd6939SJiyong Park #include <cci.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park #include <plat_arm.h> 12*54fd6939SJiyong Park 13*54fd6939SJiyong Park /****************************************************************************** 14*54fd6939SJiyong Park * The following functions are defined as weak to allow a platform to override 15*54fd6939SJiyong Park * the way ARM CCI driver is initialised and used. 16*54fd6939SJiyong Park *****************************************************************************/ 17*54fd6939SJiyong Park #pragma weak plat_arm_interconnect_enter_coherency 18*54fd6939SJiyong Park #pragma weak plat_arm_interconnect_exit_coherency 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park /****************************************************************************** 21*54fd6939SJiyong Park * Helper function to place current master into coherency 22*54fd6939SJiyong Park *****************************************************************************/ plat_ls_interconnect_enter_coherency(unsigned int num_clusters)23*54fd6939SJiyong Parkvoid plat_ls_interconnect_enter_coherency(unsigned int num_clusters) 24*54fd6939SJiyong Park { 25*54fd6939SJiyong Park cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 26*54fd6939SJiyong Park 27*54fd6939SJiyong Park for (uint32_t index = 1U; index < num_clusters; index++) { 28*54fd6939SJiyong Park cci_enable_snoop_dvm_reqs(index); 29*54fd6939SJiyong Park } 30*54fd6939SJiyong Park } 31*54fd6939SJiyong Park 32*54fd6939SJiyong Park /****************************************************************************** 33*54fd6939SJiyong Park * Helper function to remove current master from coherency 34*54fd6939SJiyong Park *****************************************************************************/ plat_ls_interconnect_exit_coherency(void)35*54fd6939SJiyong Parkvoid plat_ls_interconnect_exit_coherency(void) 36*54fd6939SJiyong Park { 37*54fd6939SJiyong Park cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 38*54fd6939SJiyong Park } 39