1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (C) 2018 Marvell International Ltd. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park * https://spdx.org/licenses 6*54fd6939SJiyong Park */ 7*54fd6939SJiyong Park 8*54fd6939SJiyong Park #ifndef PHY_DEFAULT_PORTING_LAYER_H 9*54fd6939SJiyong Park #define PHY_DEFAULT_PORTING_LAYER_H 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park #define MAX_LANE_NR 6 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park #warning "Using default comphy params - you may need to suit them to your board" 15*54fd6939SJiyong Park 16*54fd6939SJiyong Park static const struct xfi_params 17*54fd6939SJiyong Park xfi_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = { 18*54fd6939SJiyong Park [0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = { 19*54fd6939SJiyong Park .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, .align90 = 0x5f, 20*54fd6939SJiyong Park .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe, 21*54fd6939SJiyong Park .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, .g1_tx_emph_en = 0x1, 22*54fd6939SJiyong Park .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0, 23*54fd6939SJiyong Park .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, .valid = 1 24*54fd6939SJiyong Park } 25*54fd6939SJiyong Park }; 26*54fd6939SJiyong Park 27*54fd6939SJiyong Park static const struct sata_params 28*54fd6939SJiyong Park sata_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = { 29*54fd6939SJiyong Park [0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = { 30*54fd6939SJiyong Park .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e, 31*54fd6939SJiyong Park .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe, 32*54fd6939SJiyong Park .g1_emph_en = 0x1, .g2_emph_en = 0x1, .g3_emph_en = 0x1, 33*54fd6939SJiyong Park .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1, 34*54fd6939SJiyong Park .g3_tx_amp_adj = 0x1, 35*54fd6939SJiyong Park .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0, 36*54fd6939SJiyong Park .g3_tx_emph_en = 0x0, 37*54fd6939SJiyong Park .g1_tx_emph = 0x1, .g2_tx_emph = 0x1, .g3_tx_emph = 0x1, 38*54fd6939SJiyong Park .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4, .g3_ffe_cap_sel = 0xf, 39*54fd6939SJiyong Park .align90 = 0x61, 40*54fd6939SJiyong Park .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3, 41*54fd6939SJiyong Park .g3_rx_selmuff = 0x3, 42*54fd6939SJiyong Park .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0, 43*54fd6939SJiyong Park .g3_rx_selmufi = 0x3, 44*54fd6939SJiyong Park .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1, 45*54fd6939SJiyong Park .g3_rx_selmupf = 0x2, 46*54fd6939SJiyong Park .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0, 47*54fd6939SJiyong Park .g3_rx_selmupi = 0x2, 48*54fd6939SJiyong Park .polarity_invert = COMPHY_POLARITY_NO_INVERT, 49*54fd6939SJiyong Park .valid = 0x1 50*54fd6939SJiyong Park }, 51*54fd6939SJiyong Park }; 52*54fd6939SJiyong Park 53*54fd6939SJiyong Park static const struct usb_params 54*54fd6939SJiyong Park usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = { 55*54fd6939SJiyong Park [0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = { 56*54fd6939SJiyong Park .polarity_invert = COMPHY_POLARITY_NO_INVERT 57*54fd6939SJiyong Park }, 58*54fd6939SJiyong Park }; 59*54fd6939SJiyong Park #endif /* PHY_DEFAULT_PORTING_LAYER_H */ 60