1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright (c) 2013-2020, Arm Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park# Copyright (c) 2021, NVIDIA Corporation. All rights reserved. 4*54fd6939SJiyong Park# 5*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 6*54fd6939SJiyong Park# 7*54fd6939SJiyong Park 8*54fd6939SJiyong Park# Default configuration values 9*54fd6939SJiyong ParkGICV3_SUPPORT_GIC600 ?= 0 10*54fd6939SJiyong ParkGICV3_SUPPORT_GIC600AE_FMU ?= 0 11*54fd6939SJiyong ParkGICV3_IMPL_GIC600_MULTICHIP ?= 0 12*54fd6939SJiyong ParkGICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0 13*54fd6939SJiyong ParkGIC_ENABLE_V4_EXTN ?= 0 14*54fd6939SJiyong ParkGIC_EXT_INTID ?= 0 15*54fd6939SJiyong Park 16*54fd6939SJiyong ParkGICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \ 17*54fd6939SJiyong Park drivers/arm/gic/v3/gicv3_helpers.c \ 18*54fd6939SJiyong Park drivers/arm/gic/v3/gicdv3_helpers.c \ 19*54fd6939SJiyong Park drivers/arm/gic/v3/gicrv3_helpers.c 20*54fd6939SJiyong Park 21*54fd6939SJiyong Parkifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1) 22*54fd6939SJiyong ParkGICV3_SOURCES += drivers/arm/gic/v3/gic600ae_fmu.c \ 23*54fd6939SJiyong Park drivers/arm/gic/v3/gic600ae_fmu_helpers.c 24*54fd6939SJiyong Parkendif 25*54fd6939SJiyong Park 26*54fd6939SJiyong Parkifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0) 27*54fd6939SJiyong ParkGICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c 28*54fd6939SJiyong Parkendif 29*54fd6939SJiyong Park 30*54fd6939SJiyong ParkGICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c 31*54fd6939SJiyong Parkifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1) 32*54fd6939SJiyong ParkGICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c 33*54fd6939SJiyong Parkendif 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park# Set GIC-600 support 36*54fd6939SJiyong Park$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600)) 37*54fd6939SJiyong Park$(eval $(call add_define,GICV3_SUPPORT_GIC600)) 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park# Set GIC-600AE FMU support 40*54fd6939SJiyong Park$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU)) 41*54fd6939SJiyong Park$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU)) 42*54fd6939SJiyong Park 43*54fd6939SJiyong Park# Set GICv4 extension 44*54fd6939SJiyong Park$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN)) 45*54fd6939SJiyong Park$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 46*54fd6939SJiyong Park 47*54fd6939SJiyong Park# Set support for extended PPI and SPI range 48*54fd6939SJiyong Park$(eval $(call assert_boolean,GIC_EXT_INTID)) 49*54fd6939SJiyong Park$(eval $(call add_define,GIC_EXT_INTID)) 50