1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park#include <common/bl_common.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park .globl bl2u_entrypoint 12*54fd6939SJiyong Park 13*54fd6939SJiyong Park 14*54fd6939SJiyong Parkfunc bl2u_entrypoint 15*54fd6939SJiyong Park /*--------------------------------------------- 16*54fd6939SJiyong Park * Store the extents of the tzram available to 17*54fd6939SJiyong Park * BL2U and other platform specific information 18*54fd6939SJiyong Park * for future use. x0 is currently not used. 19*54fd6939SJiyong Park * --------------------------------------------- 20*54fd6939SJiyong Park */ 21*54fd6939SJiyong Park mov x20, x1 22*54fd6939SJiyong Park mov x21, x2 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park /* --------------------------------------------- 25*54fd6939SJiyong Park * Set the exception vector to something sane. 26*54fd6939SJiyong Park * --------------------------------------------- 27*54fd6939SJiyong Park */ 28*54fd6939SJiyong Park adr x0, early_exceptions 29*54fd6939SJiyong Park msr vbar_el1, x0 30*54fd6939SJiyong Park isb 31*54fd6939SJiyong Park 32*54fd6939SJiyong Park /* --------------------------------------------- 33*54fd6939SJiyong Park * Enable the SError interrupt now that the 34*54fd6939SJiyong Park * exception vectors have been setup. 35*54fd6939SJiyong Park * --------------------------------------------- 36*54fd6939SJiyong Park */ 37*54fd6939SJiyong Park msr daifclr, #DAIF_ABT_BIT 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park /* --------------------------------------------- 40*54fd6939SJiyong Park * Enable the instruction cache, stack pointer 41*54fd6939SJiyong Park * and data access alignment checks and disable 42*54fd6939SJiyong Park * speculative loads. 43*54fd6939SJiyong Park * --------------------------------------------- 44*54fd6939SJiyong Park */ 45*54fd6939SJiyong Park mov x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT) 46*54fd6939SJiyong Park mrs x0, sctlr_el1 47*54fd6939SJiyong Park orr x0, x0, x1 48*54fd6939SJiyong Park bic x0, x0, #SCTLR_DSSBS_BIT 49*54fd6939SJiyong Park msr sctlr_el1, x0 50*54fd6939SJiyong Park isb 51*54fd6939SJiyong Park 52*54fd6939SJiyong Park /* --------------------------------------------- 53*54fd6939SJiyong Park * Invalidate the RW memory used by the BL2U 54*54fd6939SJiyong Park * image. This includes the data and NOBITS 55*54fd6939SJiyong Park * sections. This is done to safeguard against 56*54fd6939SJiyong Park * possible corruption of this memory by dirty 57*54fd6939SJiyong Park * cache lines in a system cache as a result of 58*54fd6939SJiyong Park * use by an earlier boot loader stage. 59*54fd6939SJiyong Park * --------------------------------------------- 60*54fd6939SJiyong Park */ 61*54fd6939SJiyong Park adr x0, __RW_START__ 62*54fd6939SJiyong Park adr x1, __RW_END__ 63*54fd6939SJiyong Park sub x1, x1, x0 64*54fd6939SJiyong Park bl inv_dcache_range 65*54fd6939SJiyong Park 66*54fd6939SJiyong Park /* --------------------------------------------- 67*54fd6939SJiyong Park * Zero out NOBITS sections. There are 2 of them: 68*54fd6939SJiyong Park * - the .bss section; 69*54fd6939SJiyong Park * - the coherent memory section. 70*54fd6939SJiyong Park * --------------------------------------------- 71*54fd6939SJiyong Park */ 72*54fd6939SJiyong Park adrp x0, __BSS_START__ 73*54fd6939SJiyong Park add x0, x0, :lo12:__BSS_START__ 74*54fd6939SJiyong Park adrp x1, __BSS_END__ 75*54fd6939SJiyong Park add x1, x1, :lo12:__BSS_END__ 76*54fd6939SJiyong Park sub x1, x1, x0 77*54fd6939SJiyong Park bl zeromem 78*54fd6939SJiyong Park 79*54fd6939SJiyong Park /* -------------------------------------------- 80*54fd6939SJiyong Park * Allocate a stack whose memory will be marked 81*54fd6939SJiyong Park * as Normal-IS-WBWA when the MMU is enabled. 82*54fd6939SJiyong Park * There is no risk of reading stale stack 83*54fd6939SJiyong Park * memory after enabling the MMU as only the 84*54fd6939SJiyong Park * primary cpu is running at the moment. 85*54fd6939SJiyong Park * -------------------------------------------- 86*54fd6939SJiyong Park */ 87*54fd6939SJiyong Park bl plat_set_my_stack 88*54fd6939SJiyong Park 89*54fd6939SJiyong Park /* --------------------------------------------- 90*54fd6939SJiyong Park * Initialize the stack protector canary before 91*54fd6939SJiyong Park * any C code is called. 92*54fd6939SJiyong Park * --------------------------------------------- 93*54fd6939SJiyong Park */ 94*54fd6939SJiyong Park#if STACK_PROTECTOR_ENABLED 95*54fd6939SJiyong Park bl update_stack_protector_canary 96*54fd6939SJiyong Park#endif 97*54fd6939SJiyong Park 98*54fd6939SJiyong Park /* --------------------------------------------- 99*54fd6939SJiyong Park * Perform early platform setup & platform 100*54fd6939SJiyong Park * specific early arch. setup e.g. mmu setup 101*54fd6939SJiyong Park * --------------------------------------------- 102*54fd6939SJiyong Park */ 103*54fd6939SJiyong Park mov x0, x20 104*54fd6939SJiyong Park mov x1, x21 105*54fd6939SJiyong Park bl bl2u_early_platform_setup 106*54fd6939SJiyong Park bl bl2u_plat_arch_setup 107*54fd6939SJiyong Park 108*54fd6939SJiyong Park#if ENABLE_PAUTH 109*54fd6939SJiyong Park /* --------------------------------------------- 110*54fd6939SJiyong Park * Program APIAKey_EL1 111*54fd6939SJiyong Park * and enable pointer authentication. 112*54fd6939SJiyong Park * --------------------------------------------- 113*54fd6939SJiyong Park */ 114*54fd6939SJiyong Park bl pauth_init_enable_el1 115*54fd6939SJiyong Park#endif 116*54fd6939SJiyong Park 117*54fd6939SJiyong Park /* --------------------------------------------- 118*54fd6939SJiyong Park * Jump to bl2u_main function. 119*54fd6939SJiyong Park * --------------------------------------------- 120*54fd6939SJiyong Park */ 121*54fd6939SJiyong Park bl bl2u_main 122*54fd6939SJiyong Park 123*54fd6939SJiyong Park /* --------------------------------------------- 124*54fd6939SJiyong Park * Should never reach this point. 125*54fd6939SJiyong Park * --------------------------------------------- 126*54fd6939SJiyong Park */ 127*54fd6939SJiyong Park no_ret plat_panic_handler 128*54fd6939SJiyong Park 129*54fd6939SJiyong Parkendfunc bl2u_entrypoint 130