1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park#include <common/bl_common.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park .globl bl2u_vector_table 12*54fd6939SJiyong Park .globl bl2u_entrypoint 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park 15*54fd6939SJiyong Parkvector_base bl2u_vector_table 16*54fd6939SJiyong Park b bl2u_entrypoint 17*54fd6939SJiyong Park b report_exception /* Undef */ 18*54fd6939SJiyong Park b report_exception /* SVC call */ 19*54fd6939SJiyong Park b report_exception /* Prefetch abort */ 20*54fd6939SJiyong Park b report_exception /* Data abort */ 21*54fd6939SJiyong Park b report_exception /* Reserved */ 22*54fd6939SJiyong Park b report_exception /* IRQ */ 23*54fd6939SJiyong Park b report_exception /* FIQ */ 24*54fd6939SJiyong Park 25*54fd6939SJiyong Park 26*54fd6939SJiyong Parkfunc bl2u_entrypoint 27*54fd6939SJiyong Park /*--------------------------------------------- 28*54fd6939SJiyong Park * Save from r1 the extents of the trusted ram 29*54fd6939SJiyong Park * available to BL2U for future use. 30*54fd6939SJiyong Park * r0 is not currently used. 31*54fd6939SJiyong Park * --------------------------------------------- 32*54fd6939SJiyong Park */ 33*54fd6939SJiyong Park mov r11, r1 34*54fd6939SJiyong Park mov r10, r2 35*54fd6939SJiyong Park 36*54fd6939SJiyong Park /* --------------------------------------------- 37*54fd6939SJiyong Park * Set the exception vector to something sane. 38*54fd6939SJiyong Park * --------------------------------------------- 39*54fd6939SJiyong Park */ 40*54fd6939SJiyong Park ldr r0, =bl2u_vector_table 41*54fd6939SJiyong Park stcopr r0, VBAR 42*54fd6939SJiyong Park isb 43*54fd6939SJiyong Park 44*54fd6939SJiyong Park /* -------------------------------------------------------- 45*54fd6939SJiyong Park * Enable the instruction cache - disable speculative loads 46*54fd6939SJiyong Park * -------------------------------------------------------- 47*54fd6939SJiyong Park */ 48*54fd6939SJiyong Park ldcopr r0, SCTLR 49*54fd6939SJiyong Park orr r0, r0, #SCTLR_I_BIT 50*54fd6939SJiyong Park bic r0, r0, #SCTLR_DSSBS_BIT 51*54fd6939SJiyong Park stcopr r0, SCTLR 52*54fd6939SJiyong Park isb 53*54fd6939SJiyong Park 54*54fd6939SJiyong Park /* --------------------------------------------- 55*54fd6939SJiyong Park * Since BL2U executes after BL1, it is assumed 56*54fd6939SJiyong Park * here that BL1 has already has done the 57*54fd6939SJiyong Park * necessary register initializations. 58*54fd6939SJiyong Park * --------------------------------------------- 59*54fd6939SJiyong Park */ 60*54fd6939SJiyong Park 61*54fd6939SJiyong Park /* --------------------------------------------- 62*54fd6939SJiyong Park * Invalidate the RW memory used by the BL2U 63*54fd6939SJiyong Park * image. This includes the data and NOBITS 64*54fd6939SJiyong Park * sections. This is done to safeguard against 65*54fd6939SJiyong Park * possible corruption of this memory by dirty 66*54fd6939SJiyong Park * cache lines in a system cache as a result of 67*54fd6939SJiyong Park * use by an earlier boot loader stage. 68*54fd6939SJiyong Park * --------------------------------------------- 69*54fd6939SJiyong Park */ 70*54fd6939SJiyong Park ldr r0, =__RW_START__ 71*54fd6939SJiyong Park ldr r1, =__RW_END__ 72*54fd6939SJiyong Park sub r1, r1, r0 73*54fd6939SJiyong Park bl inv_dcache_range 74*54fd6939SJiyong Park 75*54fd6939SJiyong Park /* --------------------------------------------- 76*54fd6939SJiyong Park * Zero out NOBITS sections. There are 2 of them: 77*54fd6939SJiyong Park * - the .bss section; 78*54fd6939SJiyong Park * - the coherent memory section. 79*54fd6939SJiyong Park * --------------------------------------------- 80*54fd6939SJiyong Park */ 81*54fd6939SJiyong Park ldr r0, =__BSS_START__ 82*54fd6939SJiyong Park ldr r1, =__BSS_END__ 83*54fd6939SJiyong Park sub r1, r1, r0 84*54fd6939SJiyong Park bl zeromem 85*54fd6939SJiyong Park 86*54fd6939SJiyong Park /* -------------------------------------------- 87*54fd6939SJiyong Park * Allocate a stack whose memory will be marked 88*54fd6939SJiyong Park * as Normal-IS-WBWA when the MMU is enabled. 89*54fd6939SJiyong Park * There is no risk of reading stale stack 90*54fd6939SJiyong Park * memory after enabling the MMU as only the 91*54fd6939SJiyong Park * primary cpu is running at the moment. 92*54fd6939SJiyong Park * -------------------------------------------- 93*54fd6939SJiyong Park */ 94*54fd6939SJiyong Park bl plat_set_my_stack 95*54fd6939SJiyong Park 96*54fd6939SJiyong Park /* --------------------------------------------- 97*54fd6939SJiyong Park * Initialize the stack protector canary before 98*54fd6939SJiyong Park * any C code is called. 99*54fd6939SJiyong Park * --------------------------------------------- 100*54fd6939SJiyong Park */ 101*54fd6939SJiyong Park#if STACK_PROTECTOR_ENABLED 102*54fd6939SJiyong Park bl update_stack_protector_canary 103*54fd6939SJiyong Park#endif 104*54fd6939SJiyong Park 105*54fd6939SJiyong Park /* --------------------------------------------- 106*54fd6939SJiyong Park * Perform early platform setup & platform 107*54fd6939SJiyong Park * specific early arch. setup e.g. mmu setup 108*54fd6939SJiyong Park * --------------------------------------------- 109*54fd6939SJiyong Park */ 110*54fd6939SJiyong Park mov r0, r11 111*54fd6939SJiyong Park mov r1, r10 112*54fd6939SJiyong Park bl bl2u_early_platform_setup 113*54fd6939SJiyong Park bl bl2u_plat_arch_setup 114*54fd6939SJiyong Park 115*54fd6939SJiyong Park /* --------------------------------------------- 116*54fd6939SJiyong Park * Jump to main function. 117*54fd6939SJiyong Park * --------------------------------------------- 118*54fd6939SJiyong Park */ 119*54fd6939SJiyong Park bl bl2u_main 120*54fd6939SJiyong Park 121*54fd6939SJiyong Park /* --------------------------------------------- 122*54fd6939SJiyong Park * Should never reach this point. 123*54fd6939SJiyong Park * --------------------------------------------- 124*54fd6939SJiyong Park */ 125*54fd6939SJiyong Park no_ret plat_panic_handler 126*54fd6939SJiyong Park 127*54fd6939SJiyong Parkendfunc bl2u_entrypoint 128