1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park#include <bl1/bl1.h> 10*54fd6939SJiyong Park#include <common/bl_common.h> 11*54fd6939SJiyong Park#include <context.h> 12*54fd6939SJiyong Park 13*54fd6939SJiyong Park/* ----------------------------------------------------------------------------- 14*54fd6939SJiyong Park * Very simple stackless exception handlers used by BL2. 15*54fd6939SJiyong Park * ----------------------------------------------------------------------------- 16*54fd6939SJiyong Park */ 17*54fd6939SJiyong Park .globl bl2_el3_exceptions 18*54fd6939SJiyong Park 19*54fd6939SJiyong Parkvector_base bl2_el3_exceptions 20*54fd6939SJiyong Park 21*54fd6939SJiyong Park /* ----------------------------------------------------- 22*54fd6939SJiyong Park * Current EL with SP0 : 0x0 - 0x200 23*54fd6939SJiyong Park * ----------------------------------------------------- 24*54fd6939SJiyong Park */ 25*54fd6939SJiyong Parkvector_entry SynchronousExceptionSP0 26*54fd6939SJiyong Park mov x0, #SYNC_EXCEPTION_SP_EL0 27*54fd6939SJiyong Park bl plat_report_exception 28*54fd6939SJiyong Park no_ret plat_panic_handler 29*54fd6939SJiyong Parkend_vector_entry SynchronousExceptionSP0 30*54fd6939SJiyong Park 31*54fd6939SJiyong Parkvector_entry IrqSP0 32*54fd6939SJiyong Park mov x0, #IRQ_SP_EL0 33*54fd6939SJiyong Park bl plat_report_exception 34*54fd6939SJiyong Park no_ret plat_panic_handler 35*54fd6939SJiyong Parkend_vector_entry IrqSP0 36*54fd6939SJiyong Park 37*54fd6939SJiyong Parkvector_entry FiqSP0 38*54fd6939SJiyong Park mov x0, #FIQ_SP_EL0 39*54fd6939SJiyong Park bl plat_report_exception 40*54fd6939SJiyong Park no_ret plat_panic_handler 41*54fd6939SJiyong Parkend_vector_entry FiqSP0 42*54fd6939SJiyong Park 43*54fd6939SJiyong Parkvector_entry SErrorSP0 44*54fd6939SJiyong Park mov x0, #SERROR_SP_EL0 45*54fd6939SJiyong Park bl plat_report_exception 46*54fd6939SJiyong Park no_ret plat_panic_handler 47*54fd6939SJiyong Parkend_vector_entry SErrorSP0 48*54fd6939SJiyong Park 49*54fd6939SJiyong Park /* ----------------------------------------------------- 50*54fd6939SJiyong Park * Current EL with SPx: 0x200 - 0x400 51*54fd6939SJiyong Park * ----------------------------------------------------- 52*54fd6939SJiyong Park */ 53*54fd6939SJiyong Parkvector_entry SynchronousExceptionSPx 54*54fd6939SJiyong Park mov x0, #SYNC_EXCEPTION_SP_ELX 55*54fd6939SJiyong Park bl plat_report_exception 56*54fd6939SJiyong Park no_ret plat_panic_handler 57*54fd6939SJiyong Parkend_vector_entry SynchronousExceptionSPx 58*54fd6939SJiyong Park 59*54fd6939SJiyong Parkvector_entry IrqSPx 60*54fd6939SJiyong Park mov x0, #IRQ_SP_ELX 61*54fd6939SJiyong Park bl plat_report_exception 62*54fd6939SJiyong Park no_ret plat_panic_handler 63*54fd6939SJiyong Parkend_vector_entry IrqSPx 64*54fd6939SJiyong Park 65*54fd6939SJiyong Parkvector_entry FiqSPx 66*54fd6939SJiyong Park mov x0, #FIQ_SP_ELX 67*54fd6939SJiyong Park bl plat_report_exception 68*54fd6939SJiyong Park no_ret plat_panic_handler 69*54fd6939SJiyong Parkend_vector_entry FiqSPx 70*54fd6939SJiyong Park 71*54fd6939SJiyong Parkvector_entry SErrorSPx 72*54fd6939SJiyong Park mov x0, #SERROR_SP_ELX 73*54fd6939SJiyong Park bl plat_report_exception 74*54fd6939SJiyong Park no_ret plat_panic_handler 75*54fd6939SJiyong Parkend_vector_entry SErrorSPx 76*54fd6939SJiyong Park 77*54fd6939SJiyong Park /* ----------------------------------------------------- 78*54fd6939SJiyong Park * Lower EL using AArch64 : 0x400 - 0x600 79*54fd6939SJiyong Park * ----------------------------------------------------- 80*54fd6939SJiyong Park */ 81*54fd6939SJiyong Parkvector_entry SynchronousExceptionA64 82*54fd6939SJiyong Park mov x0, #SYNC_EXCEPTION_AARCH64 83*54fd6939SJiyong Park bl plat_report_exception 84*54fd6939SJiyong Park no_ret plat_panic_handler 85*54fd6939SJiyong Parkend_vector_entry SynchronousExceptionA64 86*54fd6939SJiyong Park 87*54fd6939SJiyong Parkvector_entry IrqA64 88*54fd6939SJiyong Park mov x0, #IRQ_AARCH64 89*54fd6939SJiyong Park bl plat_report_exception 90*54fd6939SJiyong Park no_ret plat_panic_handler 91*54fd6939SJiyong Parkend_vector_entry IrqA64 92*54fd6939SJiyong Park 93*54fd6939SJiyong Parkvector_entry FiqA64 94*54fd6939SJiyong Park mov x0, #FIQ_AARCH64 95*54fd6939SJiyong Park bl plat_report_exception 96*54fd6939SJiyong Park no_ret plat_panic_handler 97*54fd6939SJiyong Parkend_vector_entry FiqA64 98*54fd6939SJiyong Park 99*54fd6939SJiyong Parkvector_entry SErrorA64 100*54fd6939SJiyong Park mov x0, #SERROR_AARCH64 101*54fd6939SJiyong Park bl plat_report_exception 102*54fd6939SJiyong Park no_ret plat_panic_handler 103*54fd6939SJiyong Parkend_vector_entry SErrorA64 104*54fd6939SJiyong Park 105*54fd6939SJiyong Park /* ----------------------------------------------------- 106*54fd6939SJiyong Park * Lower EL using AArch32 : 0x600 - 0x800 107*54fd6939SJiyong Park * ----------------------------------------------------- 108*54fd6939SJiyong Park */ 109*54fd6939SJiyong Parkvector_entry SynchronousExceptionA32 110*54fd6939SJiyong Park mov x0, #SYNC_EXCEPTION_AARCH32 111*54fd6939SJiyong Park bl plat_report_exception 112*54fd6939SJiyong Park no_ret plat_panic_handler 113*54fd6939SJiyong Parkend_vector_entry SynchronousExceptionA32 114*54fd6939SJiyong Park 115*54fd6939SJiyong Parkvector_entry IrqA32 116*54fd6939SJiyong Park mov x0, #IRQ_AARCH32 117*54fd6939SJiyong Park bl plat_report_exception 118*54fd6939SJiyong Park no_ret plat_panic_handler 119*54fd6939SJiyong Parkend_vector_entry IrqA32 120*54fd6939SJiyong Park 121*54fd6939SJiyong Parkvector_entry FiqA32 122*54fd6939SJiyong Park mov x0, #FIQ_AARCH32 123*54fd6939SJiyong Park bl plat_report_exception 124*54fd6939SJiyong Park no_ret plat_panic_handler 125*54fd6939SJiyong Parkend_vector_entry FiqA32 126*54fd6939SJiyong Park 127*54fd6939SJiyong Parkvector_entry SErrorA32 128*54fd6939SJiyong Park mov x0, #SERROR_AARCH32 129*54fd6939SJiyong Park bl plat_report_exception 130*54fd6939SJiyong Park no_ret plat_panic_handler 131*54fd6939SJiyong Parkend_vector_entry SErrorA32 132