1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <common/bl_common.h> 9*54fd6939SJiyong Park#include <el3_common_macros.S> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park .globl bl1_entrypoint 12*54fd6939SJiyong Park .globl bl1_run_bl2_in_root 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park 15*54fd6939SJiyong Park /* ----------------------------------------------------- 16*54fd6939SJiyong Park * bl1_entrypoint() is the entry point into the trusted 17*54fd6939SJiyong Park * firmware code when a cpu is released from warm or 18*54fd6939SJiyong Park * cold reset. 19*54fd6939SJiyong Park * ----------------------------------------------------- 20*54fd6939SJiyong Park */ 21*54fd6939SJiyong Park 22*54fd6939SJiyong Parkfunc bl1_entrypoint 23*54fd6939SJiyong Park /* --------------------------------------------------------------------- 24*54fd6939SJiyong Park * If the reset address is programmable then bl1_entrypoint() is 25*54fd6939SJiyong Park * executed only on the cold boot path. Therefore, we can skip the warm 26*54fd6939SJiyong Park * boot mailbox mechanism. 27*54fd6939SJiyong Park * --------------------------------------------------------------------- 28*54fd6939SJiyong Park */ 29*54fd6939SJiyong Park el3_entrypoint_common \ 30*54fd6939SJiyong Park _init_sctlr=1 \ 31*54fd6939SJiyong Park _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \ 32*54fd6939SJiyong Park _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ 33*54fd6939SJiyong Park _init_memory=1 \ 34*54fd6939SJiyong Park _init_c_runtime=1 \ 35*54fd6939SJiyong Park _exception_vectors=bl1_exceptions \ 36*54fd6939SJiyong Park _pie_fixup_size=0 37*54fd6939SJiyong Park 38*54fd6939SJiyong Park /* -------------------------------------------------------------------- 39*54fd6939SJiyong Park * Perform BL1 setup 40*54fd6939SJiyong Park * -------------------------------------------------------------------- 41*54fd6939SJiyong Park */ 42*54fd6939SJiyong Park bl bl1_setup 43*54fd6939SJiyong Park 44*54fd6939SJiyong Park#if ENABLE_PAUTH 45*54fd6939SJiyong Park /* -------------------------------------------------------------------- 46*54fd6939SJiyong Park * Program APIAKey_EL1 and enable pointer authentication. 47*54fd6939SJiyong Park * -------------------------------------------------------------------- 48*54fd6939SJiyong Park */ 49*54fd6939SJiyong Park bl pauth_init_enable_el3 50*54fd6939SJiyong Park#endif /* ENABLE_PAUTH */ 51*54fd6939SJiyong Park 52*54fd6939SJiyong Park /* -------------------------------------------------------------------- 53*54fd6939SJiyong Park * Initialize platform and jump to our c-entry point 54*54fd6939SJiyong Park * for this type of reset. 55*54fd6939SJiyong Park * -------------------------------------------------------------------- 56*54fd6939SJiyong Park */ 57*54fd6939SJiyong Park bl bl1_main 58*54fd6939SJiyong Park 59*54fd6939SJiyong Park#if ENABLE_PAUTH 60*54fd6939SJiyong Park /* -------------------------------------------------------------------- 61*54fd6939SJiyong Park * Disable pointer authentication before jumping to next boot image. 62*54fd6939SJiyong Park * -------------------------------------------------------------------- 63*54fd6939SJiyong Park */ 64*54fd6939SJiyong Park bl pauth_disable_el3 65*54fd6939SJiyong Park#endif /* ENABLE_PAUTH */ 66*54fd6939SJiyong Park 67*54fd6939SJiyong Park /* -------------------------------------------------- 68*54fd6939SJiyong Park * Do the transition to next boot image. 69*54fd6939SJiyong Park * -------------------------------------------------- 70*54fd6939SJiyong Park */ 71*54fd6939SJiyong Park#if ENABLE_RME 72*54fd6939SJiyong Park b bl1_run_bl2_in_root 73*54fd6939SJiyong Park#else 74*54fd6939SJiyong Park b el3_exit 75*54fd6939SJiyong Park#endif 76*54fd6939SJiyong Parkendfunc bl1_entrypoint 77*54fd6939SJiyong Park 78*54fd6939SJiyong Park /* ----------------------------------------------------- 79*54fd6939SJiyong Park * void bl1_run_bl2_in_root(); 80*54fd6939SJiyong Park * This function runs BL2 in root/EL3 when RME is enabled. 81*54fd6939SJiyong Park * ----------------------------------------------------- 82*54fd6939SJiyong Park */ 83*54fd6939SJiyong Park 84*54fd6939SJiyong Parkfunc bl1_run_bl2_in_root 85*54fd6939SJiyong Park /* read bl2_ep_info */ 86*54fd6939SJiyong Park adrp x20, bl2_ep_info 87*54fd6939SJiyong Park add x20, x20, :lo12:bl2_ep_info 88*54fd6939SJiyong Park ldr x20, [x20] 89*54fd6939SJiyong Park 90*54fd6939SJiyong Park /* --------------------------------------------- 91*54fd6939SJiyong Park * MMU needs to be disabled because BL2 executes 92*54fd6939SJiyong Park * in EL3. It will initialize the address space 93*54fd6939SJiyong Park * according to its own requirements. 94*54fd6939SJiyong Park * --------------------------------------------- 95*54fd6939SJiyong Park */ 96*54fd6939SJiyong Park bl disable_mmu_icache_el3 97*54fd6939SJiyong Park tlbi alle3 98*54fd6939SJiyong Park 99*54fd6939SJiyong Park ldp x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET] 100*54fd6939SJiyong Park msr elr_el3, x0 101*54fd6939SJiyong Park msr spsr_el3, x1 102*54fd6939SJiyong Park 103*54fd6939SJiyong Park ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)] 104*54fd6939SJiyong Park ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)] 105*54fd6939SJiyong Park ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)] 106*54fd6939SJiyong Park ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)] 107*54fd6939SJiyong Park exception_return 108*54fd6939SJiyong Parkendfunc bl1_run_bl2_in_root 109