1*412f47f9SXin Li /*
2*412f47f9SXin Li * Single-precision vector sinh(x) function.
3*412f47f9SXin Li *
4*412f47f9SXin Li * Copyright (c) 2022-2023, Arm Limited.
5*412f47f9SXin Li * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6*412f47f9SXin Li */
7*412f47f9SXin Li
8*412f47f9SXin Li #include "v_math.h"
9*412f47f9SXin Li #include "pl_sig.h"
10*412f47f9SXin Li #include "pl_test.h"
11*412f47f9SXin Li
12*412f47f9SXin Li #include "v_expm1f_inline.h"
13*412f47f9SXin Li
14*412f47f9SXin Li static const struct data
15*412f47f9SXin Li {
16*412f47f9SXin Li struct v_expm1f_data expm1f_consts;
17*412f47f9SXin Li uint32x4_t halff;
18*412f47f9SXin Li #if WANT_SIMD_EXCEPT
19*412f47f9SXin Li uint32x4_t tiny_bound, thresh;
20*412f47f9SXin Li #else
21*412f47f9SXin Li uint32x4_t oflow_bound;
22*412f47f9SXin Li #endif
23*412f47f9SXin Li } data = {
24*412f47f9SXin Li .expm1f_consts = V_EXPM1F_DATA,
25*412f47f9SXin Li .halff = V4 (0x3f000000),
26*412f47f9SXin Li #if WANT_SIMD_EXCEPT
27*412f47f9SXin Li /* 0x1.6a09e8p-32, below which expm1f underflows. */
28*412f47f9SXin Li .tiny_bound = V4 (0x2fb504f4),
29*412f47f9SXin Li /* asuint(oflow_bound) - asuint(tiny_bound). */
30*412f47f9SXin Li .thresh = V4 (0x12fbbbb3),
31*412f47f9SXin Li #else
32*412f47f9SXin Li /* 0x1.61814ep+6, above which expm1f helper overflows. */
33*412f47f9SXin Li .oflow_bound = V4 (0x42b0c0a7),
34*412f47f9SXin Li #endif
35*412f47f9SXin Li };
36*412f47f9SXin Li
37*412f47f9SXin Li static float32x4_t NOINLINE VPCS_ATTR
special_case(float32x4_t x,float32x4_t y,uint32x4_t special)38*412f47f9SXin Li special_case (float32x4_t x, float32x4_t y, uint32x4_t special)
39*412f47f9SXin Li {
40*412f47f9SXin Li return v_call_f32 (sinhf, x, y, special);
41*412f47f9SXin Li }
42*412f47f9SXin Li
43*412f47f9SXin Li /* Approximation for vector single-precision sinh(x) using expm1.
44*412f47f9SXin Li sinh(x) = (exp(x) - exp(-x)) / 2.
45*412f47f9SXin Li The maximum error is 2.26 ULP:
46*412f47f9SXin Li _ZGVnN4v_sinhf (0x1.e34a9ep-4) got 0x1.e469ep-4
47*412f47f9SXin Li want 0x1.e469e4p-4. */
V_NAME_F1(sinh)48*412f47f9SXin Li float32x4_t VPCS_ATTR V_NAME_F1 (sinh) (float32x4_t x)
49*412f47f9SXin Li {
50*412f47f9SXin Li const struct data *d = ptr_barrier (&data);
51*412f47f9SXin Li
52*412f47f9SXin Li uint32x4_t ix = vreinterpretq_u32_f32 (x);
53*412f47f9SXin Li float32x4_t ax = vabsq_f32 (x);
54*412f47f9SXin Li uint32x4_t iax = vreinterpretq_u32_f32 (ax);
55*412f47f9SXin Li uint32x4_t sign = veorq_u32 (ix, iax);
56*412f47f9SXin Li float32x4_t halfsign = vreinterpretq_f32_u32 (vorrq_u32 (sign, d->halff));
57*412f47f9SXin Li
58*412f47f9SXin Li #if WANT_SIMD_EXCEPT
59*412f47f9SXin Li uint32x4_t special = vcgeq_u32 (vsubq_u32 (iax, d->tiny_bound), d->thresh);
60*412f47f9SXin Li ax = v_zerofy_f32 (ax, special);
61*412f47f9SXin Li #else
62*412f47f9SXin Li uint32x4_t special = vcgeq_u32 (iax, d->oflow_bound);
63*412f47f9SXin Li #endif
64*412f47f9SXin Li
65*412f47f9SXin Li /* Up to the point that expm1f overflows, we can use it to calculate sinhf
66*412f47f9SXin Li using a slight rearrangement of the definition of asinh. This allows us
67*412f47f9SXin Li to retain acceptable accuracy for very small inputs. */
68*412f47f9SXin Li float32x4_t t = expm1f_inline (ax, &d->expm1f_consts);
69*412f47f9SXin Li t = vaddq_f32 (t, vdivq_f32 (t, vaddq_f32 (t, v_f32 (1.0))));
70*412f47f9SXin Li
71*412f47f9SXin Li /* Fall back to the scalar variant for any lanes that should trigger an
72*412f47f9SXin Li exception. */
73*412f47f9SXin Li if (unlikely (v_any_u32 (special)))
74*412f47f9SXin Li return special_case (x, vmulq_f32 (t, halfsign), special);
75*412f47f9SXin Li
76*412f47f9SXin Li return vmulq_f32 (t, halfsign);
77*412f47f9SXin Li }
78*412f47f9SXin Li
79*412f47f9SXin Li PL_SIG (V, F, 1, sinh, -10.0, 10.0)
80*412f47f9SXin Li PL_TEST_ULP (V_NAME_F1 (sinh), 1.76)
81*412f47f9SXin Li PL_TEST_EXPECT_FENV (V_NAME_F1 (sinh), WANT_SIMD_EXCEPT)
82*412f47f9SXin Li PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinh), 0, 0x2fb504f4, 1000)
83*412f47f9SXin Li PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinh), 0x2fb504f4, 0x42b0c0a7, 100000)
84*412f47f9SXin Li PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinh), 0x42b0c0a7, inf, 1000)
85