xref: /aosp_15_r20/external/XNNPACK/src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/unipass-sse2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <emmintrin.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/unaligned.h>
16 
17 
xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8(size_t rows,size_t channels,const int8_t * input,size_t input_stride,const int8_t * zero,int8_t * output,const union xnn_qs8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse2_c8(
19     size_t rows,
20     size_t channels,
21     const int8_t* input,
22     size_t input_stride,
23     const int8_t* zero,
24     int8_t* output,
25     const union xnn_qs8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27   assert(rows != 0);
28   assert(rows <= 7);
29   assert(channels != 0);
30 
31   const int8_t* i0 = input;
32   const int8_t* i1 = (const int8_t*) ((uintptr_t) i0 + input_stride);
33   if XNN_UNPREDICTABLE(rows < 2) {
34     i1 = zero;
35   }
36   const int8_t* i2 = (const int8_t*) ((uintptr_t) i1 + input_stride);
37   if XNN_UNPREDICTABLE(rows <= 2) {
38     i2 = zero;
39   }
40   const int8_t* i3 = (const int8_t*) ((uintptr_t) i2 + input_stride);
41   if XNN_UNPREDICTABLE(rows < 4) {
42     i3 = zero;
43   }
44   const int8_t* i4 = (const int8_t*) ((uintptr_t) i3 + input_stride);
45   if XNN_UNPREDICTABLE(rows <= 4) {
46     i4 = zero;
47   }
48   const int8_t* i5 = (const int8_t*) ((uintptr_t) i4 + input_stride);
49   if XNN_UNPREDICTABLE(rows < 6) {
50     i5 = zero;
51   }
52   const int8_t* i6 = (const int8_t*) ((uintptr_t) i5 + input_stride);
53   if XNN_UNPREDICTABLE(rows <= 6) {
54     i6 = zero;
55   }
56 
57   const __m128i vinit_bias = _mm_load_si128((const __m128i*) params->fp32_sse2.init_bias);
58   const __m128 vscale = _mm_load_ps(params->fp32_sse2.scale);
59   const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse2.output_max_less_zero_point);
60   const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse2.output_zero_point);
61   const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse2.output_min);
62   for (; channels >= 8; channels -= 8) {
63 
64     const __m128i vi0x01234567 = _mm_loadl_epi64((const __m128i*) i0);
65     i0 += 8;
66 
67     const __m128i vxi0x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi0x01234567, vi0x01234567), 8);
68     const __m128i vi1x01234567 = _mm_loadl_epi64((const __m128i*) i1);
69     i1 += 8;
70 
71     const __m128i vxi1x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi1x01234567, vi1x01234567), 8);
72     const __m128i vi2x01234567 = _mm_loadl_epi64((const __m128i*) i2);
73     i2 += 8;
74 
75     __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
76     const __m128i vxi2x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi2x01234567, vi2x01234567), 8);
77     const __m128i vi3x01234567 = _mm_loadl_epi64((const __m128i*) i3);
78     i3 += 8;
79 
80     vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
81     const __m128i vxi3x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi3x01234567, vi3x01234567), 8);
82     const __m128i vi4x01234567 = _mm_loadl_epi64((const __m128i*) i4);
83     i4 += 8;
84 
85     vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
86     const __m128i vxi4x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi4x01234567, vi4x01234567), 8);
87     const __m128i vi5x01234567 = _mm_loadl_epi64((const __m128i*) i5);
88     i5 += 8;
89 
90     vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
91     const __m128i vxi5x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi5x01234567, vi5x01234567), 8);
92     const __m128i vi6x01234567 = _mm_loadl_epi64((const __m128i*) i6);
93     i6 += 8;
94 
95     vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
96     const __m128i vxi6x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi6x01234567, vi6x01234567), 8);
97 
98     vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
99 
100     const __m128i vsgnacc01234567 = _mm_cmpgt_epi16(_mm_setzero_si128(), vacc01234567);
101     __m128i vacc0123 = _mm_unpacklo_epi16(vacc01234567, vsgnacc01234567);
102     __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vsgnacc01234567);
103 
104     vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
105     vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
106 
107     __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
108     __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
109 
110     vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
111     vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
112 
113     vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
114     vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
115 
116     vacc0123 = _mm_cvtps_epi32(vfpacc0123);
117     vacc4567 = _mm_cvtps_epi32(vfpacc4567);
118 
119     __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
120 
121     vout01234567 = _mm_max_epi16(vout01234567, voutput_min);
122 
123     __m128i vout0123456701234567 = _mm_packs_epi16(vout01234567, vout01234567);
124 
125 
126     _mm_storel_epi64((__m128i*) output, vout0123456701234567);
127     output += 8;
128   }
129   if XNN_UNLIKELY(channels != 0) {
130     {
131 
132       const __m128i vi0x01234567 = _mm_loadl_epi64((const __m128i*) i0);
133       i0 += 8;
134 
135       const __m128i vi1x01234567 = _mm_loadl_epi64((const __m128i*) i1);
136       i1 += 8;
137 
138       const __m128i vxi0x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi0x01234567, vi0x01234567), 8);
139       const __m128i vi2x01234567 = _mm_loadl_epi64((const __m128i*) i2);
140       i2 += 8;
141 
142       const __m128i vxi1x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi1x01234567, vi1x01234567), 8);
143       const __m128i vi3x01234567 = _mm_loadl_epi64((const __m128i*) i3);
144       i3 += 8;
145 
146       __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
147       const __m128i vxi2x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi2x01234567, vi2x01234567), 8);
148       const __m128i vi4x01234567 = _mm_loadl_epi64((const __m128i*) i4);
149       i4 += 8;
150 
151       vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
152       const __m128i vxi3x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi3x01234567, vi3x01234567), 8);
153       const __m128i vi5x01234567 = _mm_loadl_epi64((const __m128i*) i5);
154       i5 += 8;
155 
156       vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
157       const __m128i vxi4x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi4x01234567, vi4x01234567), 8);
158       const __m128i vi6x01234567 = _mm_loadl_epi64((const __m128i*) i6);
159       i6 += 8;
160 
161       vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
162       const __m128i vxi5x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi5x01234567, vi5x01234567), 8);
163 
164       vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
165       const __m128i vxi6x01234567 = _mm_srai_epi16(_mm_unpacklo_epi8(vi6x01234567, vi6x01234567), 8);
166 
167       vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
168 
169       const __m128i vsgnacc01234567 = _mm_cmpgt_epi16(_mm_setzero_si128(), vacc01234567);
170       __m128i vacc0123 = _mm_unpacklo_epi16(vacc01234567, vsgnacc01234567);
171       __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vsgnacc01234567);
172 
173       vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
174       vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
175 
176       __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
177       __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
178 
179       vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
180       vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
181 
182       vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
183       vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
184 
185       vacc0123 = _mm_cvtps_epi32(vfpacc0123);
186       vacc4567 = _mm_cvtps_epi32(vfpacc4567);
187 
188       __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
189       vout01234567 = _mm_max_epi16(vout01234567, voutput_min);
190 
191       __m128i vout0123456701234567 = _mm_packs_epi16(vout01234567, vout01234567);
192 
193       if (channels & 4) {
194         unaligned_store_u32(output, (uint32_t) _mm_cvtsi128_si32(vout0123456701234567));
195         vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
196         output += 4;
197       }
198       uint32_t vout0123 = (uint32_t) _mm_cvtsi128_si32(vout0123456701234567);
199       if (channels & 2) {
200         unaligned_store_u16(output, (uint16_t) vout0123);
201         vout0123 >>= 16;
202         output += 2;
203       }
204       if (channels & 1) {
205         *output = (int8_t) vout0123;
206       }
207     }
208   }
209 }
210