xref: /aosp_15_r20/external/XNNPACK/src/f32-gemm/MRx2c4-wasmsimd.c.in (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)

// Copyright 2020 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$assert NR == 2
$assert MR % 2 == 0
$assert ACTIVATION != "MINMAX" or ARCH in ["ARM", "X86", "RELAXED"]
$assert not FMA or ARCH == "RELAXED"
#include <assert.h>

#include <wasm_simd128.h>

#include <xnnpack/gemm.h>


$assert ACTIVATION in ["LINEAR", "RELU", "MINMAX"]
$if ACTIVATION == "MINMAX":
$  WASM_F32X4_MIN={"ARM": "wasm_f32x4_min", "X86": "wasm_f32x4_pmin", "RELAXED": "__builtin_wasm_relaxed_min_f32x4"}[ARCH]
$  WASM_F32X4_MAX={"ARM": "wasm_f32x4_max", "X86": "wasm_f32x4_pmax", "RELAXED": "__builtin_wasm_relaxed_max_f32x4"}[ARCH]
$ACTIVATION_SUFFIX = {"LINEAR": ""}.get(ACTIVATION, "_" + ACTIVATION.lower())
$ISA = "wasmsimd" if not FMA and (ACTIVATION in ["LINEAR", "RELU"] or ARCH != "RELAXED") else "wasmrelaxedsimd"
$ARCH_SUFFIX = "" if not FMA and (ACTIVATION in ["LINEAR", "RELU"] or ARCH == "RELAXED") else "_" + ("fma" if FMA else ARCH.lower())
$PARAMS = {"LINEAR": "xnn_f32_default_params", "RELU": "xnn_f32_relu_params", "MINMAX": "xnn_f32_minmax_params"}[ACTIVATION]
void xnn_f32_gemm${ACTIVATION_SUFFIX}_ukernel_${MR}x${NR}c4__${ISA}${ARCH_SUFFIX}(
    size_t mr,
    size_t nc,
    size_t kc,
    const float* restrict a,
    size_t a_stride,
    const float* restrict w,
    float* restrict c,
    size_t cm_stride,
    size_t cn_stride,
    const union ${PARAMS} params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
{
  assert(mr != 0);
  assert(mr <= ${MR});
  assert(nc != 0);
  assert(kc != 0);
  assert(kc % sizeof(float) == 0);
  assert(a != NULL);
  assert(w != NULL);
  assert(c != NULL);

  const float* a0 = a;
  float* c0 = c;
  $for M in range(1, MR):
    const float* a${M} = (const float*) ((uintptr_t) a${M-1} + a_stride);
    float* c${M} = (float*) ((uintptr_t) c${M-1} + cm_stride);
    $if M % 2 == 0:
      if XNN_UNPREDICTABLE(mr <= ${M}) {
        a${M} = a${M-1};
        c${M} = c${M-1};
      }
    $elif M + 1 == MR:
      if XNN_UNPREDICTABLE(mr != ${M+1}) {
        a${M} = a${M-1};
        c${M} = c${M-1};
      }
    $else:
      if XNN_UNPREDICTABLE(mr < ${M+1}) {
        a${M} = a${M-1};
        c${M} = c${M-1};
      }

  $if ACTIVATION == "MINMAX":
    const v128_t vmin = wasm_v128_load64_splat(params->wasmsimd.min);
    const v128_t vmax = wasm_v128_load64_splat(params->wasmsimd.max);
  do {
    v128_t vacc0x0c4 = wasm_f32x4_replace_lane(wasm_f32x4_const_splat(0.0f), 0, w[0]);
    $for N in range(1, NR):
      v128_t vacc0x${N}c4 = wasm_f32x4_replace_lane(vacc0x0c4, 0, w[${N}]);
    $for M in range(1, MR):
      $for N in range(NR):
        v128_t vacc${M}x${N}c4 = vacc0x${N}c4;
    w += ${NR};

    size_t k = kc;
    for (; k >= 4 * sizeof(float); k -= 4 * sizeof(float)) {
      $for M in range(MR):
        const v128_t va${M} = wasm_v128_load(a${M});
        a${M} += 4;

      const v128_t vb0 = wasm_v128_load(w);
      $for N in range(1, NR):
        const v128_t vb${N} = wasm_v128_load(w + ${N * 4});
      w += ${NR * 4};

      $for M in range(MR):
        $for N in range(NR):
          $if FMA:
            vacc${M}x${N}c4 = __builtin_wasm_fma_f32x4(vacc${M}x${N}c4, va${M}, vb${N});
          $else:
            vacc${M}x${N}c4 = wasm_f32x4_add(vacc${M}x${N}c4, wasm_f32x4_mul(va${M}, vb${N}));
    }
    if XNN_UNLIKELY(k != 0) {
      $for M in range(MR):
        const v128_t va${M} = wasm_v128_load(a${M});
        a${M} = (const float*) ((uintptr_t) a${M} + k);

      const v128_t vb0 = wasm_v128_load(w);
      $for N in range(1, NR):
        const v128_t vb${N} = wasm_v128_load(w + ${N * 4});
      w += ${NR * 4};

      const v128_t vzero = wasm_f32x4_const_splat(0.0f);
      $for N in range(NR):
        const v128_t vmask${N} = wasm_f32x4_eq(vb${N}, vzero);

      $for M in range(MR):
        $for N in range(NR):
          $if FMA:
            vacc${M}x${N}c4 = __builtin_wasm_fma_f32x4(vacc${M}x${N}c4, wasm_v128_andnot(va${M}, vmask${N}), vb${N});
          $else:
            vacc${M}x${N}c4 = wasm_f32x4_add(vacc${M}x${N}c4, wasm_f32x4_mul(wasm_v128_andnot(va${M}, vmask${N}), vb${N}));
    }

    $for M in range(MR):
      const v128_t vacc${M}x01c2 = wasm_f32x4_add(
        wasm_v32x4_shuffle(vacc${M}x0c4, vacc${M}x1c4, 0, 4, 1, 5),
        wasm_v32x4_shuffle(vacc${M}x0c4, vacc${M}x1c4, 2, 6, 3, 7));

    $for M in range(0, MR, 2):
      v128_t vacc${M}${M+1}x01 = wasm_f32x4_add(
        wasm_v32x4_shuffle(vacc${M}x01c2, vacc${M+1}x01c2, 0, 1, 4, 5),
        wasm_v32x4_shuffle(vacc${M}x01c2, vacc${M+1}x01c2, 2, 3, 6, 7));

    $if ACTIVATION == "MINMAX":
      $for M in range(0, MR, 2):
        vacc${M}${M+1}x01 = ${WASM_F32X4_MAX}(vmin, vacc${M}${M+1}x01);

      $for M in range(0, MR, 2):
        vacc${M}${M+1}x01 = ${WASM_F32X4_MIN}(vmax, vacc${M}${M+1}x01);
    $elif ACTIVATION == "RELU":
      const v128_t vzero = wasm_i32x4_const_splat(0);
      $for M in range(0, MR, 2):
        vacc${M}${M+1}x01 = wasm_i32x4_max(vacc${M}${M+1}x01, vzero);

    if XNN_LIKELY(nc >= ${NR}) {
      $for M in reversed(range(0, MR, 2)):
        *((double*) c${M}) = wasm_f64x2_extract_lane(vacc${M}${M+1}x01, 0);
        c${M} = (float*) ((uintptr_t) c${M} + cn_stride);
        a${M} = (const float*) ((uintptr_t) a${M} - kc);
        *((double*) c${M+1}) = wasm_f64x2_extract_lane(vacc${M}${M+1}x01, 1);
        c${M+1} = (float*) ((uintptr_t) c${M+1} + cn_stride);
        a${M+1} = (const float*) ((uintptr_t) a${M+1} - kc);

      nc -= ${NR};
    } else {
      assert(nc == 1);
      $for M in reversed(range(0, MR, 2)):
        *c${M} = wasm_f32x4_extract_lane(vacc${M}${M+1}x01, 0);
        *c${M+1} = wasm_f32x4_extract_lane(vacc${M}${M+1}x01, 2);

      nc = 0;
    }
  } while (nc != 0);
}