xref: /aosp_15_r20/external/XNNPACK/src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f16-f32-vcvt/neon-int16.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/vcvt.h>
16 
17 
xnn_f16_f32_vcvt_ukernel__neon_int16_x32(size_t n,const void * input,float * output,const union xnn_f16_f32_cvt_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_f32_vcvt_ukernel__neon_int16_x32(
19     size_t n,
20     const void* input,
21     float* output,
22     const union xnn_f16_f32_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
23 {
24   assert(n != 0);
25   assert(n % sizeof(uint16_t) == 0);
26   assert(input != NULL);
27   assert(output != NULL);
28 
29   const uint16x8_t vsign_mask = vmovq_n_u16(0x8000);
30   const uint16x8_t vexp_offset = vmovq_n_u16(0x7000);
31   const float32x4_t vexp_scale = vld1q_dup_f32(&params->neon.exp_scale);
32   const uint32x4_t vmagic_bias = vmovq_n_u32(0x3F000000);
33   const uint16x8_t vdenorm_cutoff = vmovq_n_u16(0x0400);
34 
35   const uint16_t* i = (const uint16_t*) input;
36   for (; n >= 32 * sizeof(uint16_t); n -= 32 * sizeof(uint16_t)) {
37     const uint16x8_t vh0 = vld1q_u16(i); i += 8;
38     const uint16x8_t vh1 = vld1q_u16(i); i += 8;
39     const uint16x8_t vh2 = vld1q_u16(i); i += 8;
40     const uint16x8_t vh3 = vld1q_u16(i); i += 8;
41 
42     const uint16x8_t vsign0 = vandq_u16(vh0, vsign_mask);
43     const uint16x8_t vsign1 = vandq_u16(vh1, vsign_mask);
44     const uint16x8_t vsign2 = vandq_u16(vh2, vsign_mask);
45     const uint16x8_t vsign3 = vandq_u16(vh3, vsign_mask);
46 
47     const uint16x8_t vnonsign0 = veorq_u16(vh0, vsign0);
48     const uint16x8_t vnonsign1 = veorq_u16(vh1, vsign1);
49     const uint16x8_t vnonsign2 = veorq_u16(vh2, vsign2);
50     const uint16x8_t vnonsign3 = veorq_u16(vh3, vsign3);
51 
52     const uint16x8x2_t vprenorm0 = vzipq_u16(vshlq_n_u16(vnonsign0, 13), vsraq_n_u16(vexp_offset, vnonsign0, 3));
53     const uint16x8x2_t vprenorm1 = vzipq_u16(vshlq_n_u16(vnonsign1, 13), vsraq_n_u16(vexp_offset, vnonsign1, 3));
54     const uint16x8x2_t vprenorm2 = vzipq_u16(vshlq_n_u16(vnonsign2, 13), vsraq_n_u16(vexp_offset, vnonsign2, 3));
55     const uint16x8x2_t vprenorm3 = vzipq_u16(vshlq_n_u16(vnonsign3, 13), vsraq_n_u16(vexp_offset, vnonsign3, 3));
56 
57     const float32x4_t vnorm0 = vmulq_f32(vreinterpretq_f32_u16(vprenorm0.val[0]), vexp_scale);
58     const float32x4_t vnorm1 = vmulq_f32(vreinterpretq_f32_u16(vprenorm0.val[1]), vexp_scale);
59     const float32x4_t vnorm2 = vmulq_f32(vreinterpretq_f32_u16(vprenorm1.val[0]), vexp_scale);
60     const float32x4_t vnorm3 = vmulq_f32(vreinterpretq_f32_u16(vprenorm1.val[1]), vexp_scale);
61     const float32x4_t vnorm4 = vmulq_f32(vreinterpretq_f32_u16(vprenorm2.val[0]), vexp_scale);
62     const float32x4_t vnorm5 = vmulq_f32(vreinterpretq_f32_u16(vprenorm2.val[1]), vexp_scale);
63     const float32x4_t vnorm6 = vmulq_f32(vreinterpretq_f32_u16(vprenorm3.val[0]), vexp_scale);
64     const float32x4_t vnorm7 = vmulq_f32(vreinterpretq_f32_u16(vprenorm3.val[1]), vexp_scale);
65 
66     const float32x4_t vdenorm0 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_low_u16(vnonsign0))), vreinterpretq_f32_u32(vmagic_bias));
67     const float32x4_t vdenorm1 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_high_u16(vnonsign0))), vreinterpretq_f32_u32(vmagic_bias));
68     const float32x4_t vdenorm2 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_low_u16(vnonsign1))), vreinterpretq_f32_u32(vmagic_bias));
69     const float32x4_t vdenorm3 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_high_u16(vnonsign1))), vreinterpretq_f32_u32(vmagic_bias));
70     const float32x4_t vdenorm4 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_low_u16(vnonsign2))), vreinterpretq_f32_u32(vmagic_bias));
71     const float32x4_t vdenorm5 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_high_u16(vnonsign2))), vreinterpretq_f32_u32(vmagic_bias));
72     const float32x4_t vdenorm6 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_low_u16(vnonsign3))), vreinterpretq_f32_u32(vmagic_bias));
73     const float32x4_t vdenorm7 = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_high_u16(vnonsign3))), vreinterpretq_f32_u32(vmagic_bias));
74 
75     const uint16x8_t vmask0 = vcgtq_u16(vnonsign0, vdenorm_cutoff);
76     const uint16x8_t vmask1 = vcgtq_u16(vnonsign1, vdenorm_cutoff);
77     const uint16x8_t vmask2 = vcgtq_u16(vnonsign2, vdenorm_cutoff);
78     const uint16x8_t vmask3 = vcgtq_u16(vnonsign3, vdenorm_cutoff);
79 
80     const uint32x4_t vxmask0 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_low_u16(vmask0))));
81     const uint32x4_t vf0 = vorrq_u32(vshll_n_u16(vget_low_u16(vsign0), 16),
82       vreinterpretq_u32_f32(vbslq_f32(vxmask0, vnorm0, vdenorm0)));
83     const uint32x4_t vxmask2 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_low_u16(vmask1))));
84     const uint32x4_t vf2 = vorrq_u32(vshll_n_u16(vget_low_u16(vsign1), 16),
85       vreinterpretq_u32_f32(vbslq_f32(vxmask2, vnorm2, vdenorm2)));
86     const uint32x4_t vxmask4 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_low_u16(vmask2))));
87     const uint32x4_t vf4 = vorrq_u32(vshll_n_u16(vget_low_u16(vsign2), 16),
88       vreinterpretq_u32_f32(vbslq_f32(vxmask4, vnorm4, vdenorm4)));
89     const uint32x4_t vxmask6 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_low_u16(vmask3))));
90     const uint32x4_t vf6 = vorrq_u32(vshll_n_u16(vget_low_u16(vsign3), 16),
91       vreinterpretq_u32_f32(vbslq_f32(vxmask6, vnorm6, vdenorm6)));
92 
93     const uint32x4_t vxmask1 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_high_u16(vmask0))));
94     const uint32x4_t vf1 = vorrq_u32(vshll_n_u16(vget_high_u16(vsign0), 16),
95       vreinterpretq_u32_f32(vbslq_f32(vxmask1, vnorm1, vdenorm1)));
96     const uint32x4_t vxmask3 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_high_u16(vmask1))));
97     const uint32x4_t vf3 = vorrq_u32(vshll_n_u16(vget_high_u16(vsign1), 16),
98       vreinterpretq_u32_f32(vbslq_f32(vxmask3, vnorm3, vdenorm3)));
99     const uint32x4_t vxmask5 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_high_u16(vmask2))));
100     const uint32x4_t vf5 = vorrq_u32(vshll_n_u16(vget_high_u16(vsign2), 16),
101       vreinterpretq_u32_f32(vbslq_f32(vxmask5, vnorm5, vdenorm5)));
102     const uint32x4_t vxmask7 = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_high_u16(vmask3))));
103     const uint32x4_t vf7 = vorrq_u32(vshll_n_u16(vget_high_u16(vsign3), 16),
104       vreinterpretq_u32_f32(vbslq_f32(vxmask7, vnorm7, vdenorm7)));
105 
106     vst1q_f32(output, vreinterpretq_f32_u32(vf0)); output += 4;
107     vst1q_f32(output, vreinterpretq_f32_u32(vf1)); output += 4;
108     vst1q_f32(output, vreinterpretq_f32_u32(vf2)); output += 4;
109     vst1q_f32(output, vreinterpretq_f32_u32(vf3)); output += 4;
110     vst1q_f32(output, vreinterpretq_f32_u32(vf4)); output += 4;
111     vst1q_f32(output, vreinterpretq_f32_u32(vf5)); output += 4;
112     vst1q_f32(output, vreinterpretq_f32_u32(vf6)); output += 4;
113     vst1q_f32(output, vreinterpretq_f32_u32(vf7)); output += 4;
114   }
115   for (; n >= 8 * sizeof(uint16_t); n -= 8 * sizeof(uint16_t)) {
116     const uint16x8_t vh = vld1q_u16(i); i += 8;
117 
118     const uint16x8_t vsign = vandq_u16(vh, vsign_mask);
119 
120     const uint16x8_t vnonsign = veorq_u16(vh, vsign);
121 
122     const uint16x8x2_t vprenorm = vzipq_u16(vshlq_n_u16(vnonsign, 13), vsraq_n_u16(vexp_offset, vnonsign, 3));
123     const float32x4_t vnorm_lo = vmulq_f32(vreinterpretq_f32_u16(vprenorm.val[0]), vexp_scale);
124     const float32x4_t vnorm_hi = vmulq_f32(vreinterpretq_f32_u16(vprenorm.val[1]), vexp_scale);
125 
126     const float32x4_t vdenorm_lo = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_low_u16(vnonsign))), vreinterpretq_f32_u32(vmagic_bias));
127     const float32x4_t vdenorm_hi = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_high_u16(vnonsign))), vreinterpretq_f32_u32(vmagic_bias));
128 
129     const uint16x8_t vmask = vcgtq_u16(vnonsign, vdenorm_cutoff);
130 
131     const uint32x4_t vxmask_lo = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_low_u16(vmask))));
132     const uint32x4_t vf_lo = vorrq_u32(vshll_n_u16(vget_low_u16(vsign), 16),
133       vreinterpretq_u32_f32(vbslq_f32(vxmask_lo, vnorm_lo, vdenorm_lo)));
134 
135     const uint32x4_t vxmask_hi = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_high_u16(vmask))));
136     const uint32x4_t vf_hi = vorrq_u32(vshll_n_u16(vget_high_u16(vsign), 16),
137       vreinterpretq_u32_f32(vbslq_f32(vxmask_hi, vnorm_hi, vdenorm_hi)));
138 
139     vst1q_f32(output, vreinterpretq_f32_u32(vf_lo)); output += 4;
140     vst1q_f32(output, vreinterpretq_f32_u32(vf_hi)); output += 4;
141   }
142   if XNN_UNPREDICTABLE(n != 0) {
143     const uint16x8_t vh = vld1q_u16(i); i += 8;
144 
145     const uint16x8_t vsign = vandq_u16(vh, vsign_mask);
146 
147     const uint16x8_t vnonsign = veorq_u16(vh, vsign);
148 
149     const uint16x8x2_t vprenorm = vzipq_u16(vshlq_n_u16(vnonsign, 13), vsraq_n_u16(vexp_offset, vnonsign, 3));
150     const float32x4_t vnorm_lo = vmulq_f32(vreinterpretq_f32_u16(vprenorm.val[0]), vexp_scale);
151     const float32x4_t vnorm_hi = vmulq_f32(vreinterpretq_f32_u16(vprenorm.val[1]), vexp_scale);
152 
153     const float32x4_t vdenorm_lo = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_low_u16(vnonsign))), vreinterpretq_f32_u32(vmagic_bias));
154     const float32x4_t vdenorm_hi = vsubq_f32(vreinterpretq_f32_u32(vaddw_u16(vmagic_bias, vget_high_u16(vnonsign))), vreinterpretq_f32_u32(vmagic_bias));
155 
156     const uint16x8_t vmask = vcgtq_u16(vnonsign, vdenorm_cutoff);
157 
158     const uint32x4_t vxmask_lo = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_low_u16(vmask))));
159     uint32x4_t vf = vorrq_u32(vshll_n_u16(vget_low_u16(vsign), 16),
160       vreinterpretq_u32_f32(vbslq_f32(vxmask_lo, vnorm_lo, vdenorm_lo)));
161 
162     if (n & (4 * sizeof(uint16_t))) {
163       vst1q_f32(output, vreinterpretq_f32_u32(vf)); output += 4;
164 
165       const uint32x4_t vxmask_hi = vreinterpretq_u32_s32(vmovl_s16(vreinterpret_s16_u16(vget_high_u16(vmask))));
166       vf = vorrq_u32(vshll_n_u16(vget_high_u16(vsign), 16),
167         vreinterpretq_u32_f32(vbslq_f32(vxmask_hi, vnorm_hi, vdenorm_hi)));
168     }
169     uint32x2_t vf_lo = vget_low_u32(vf);
170     if (n & (2 * sizeof(uint16_t))) {
171       vst1_f32(output, vreinterpret_f32_u32(vf_lo)); output += 2;
172       vf_lo = vget_high_u32(vf);
173     }
174     if (n & (1 * sizeof(uint16_t))) {
175       vst1_lane_f32(output, vreinterpret_f32_u32(vf_lo), 0);
176     }
177   }
178 }
179