1*02ca8ccaSAndroid Build Coastguard Worker* ETMv4/PTM - decoder updates to handle advanced configuration. 2*02ca8ccaSAndroid Build Coastguard Worker-> Certain (currently unused by perf / current hardware) configuration settings 3*02ca8ccaSAndroid Build Coastguard Worker can alter the format of the trace output. One example is Return Stack - 4*02ca8ccaSAndroid Build Coastguard Worker settable in the control registers for PTM/ETMv4, and removes some inline 5*02ca8ccaSAndroid Build Coastguard Worker addresses. Decoder must use a follower to correctly trace when this is set. 6*02ca8ccaSAndroid Build Coastguard Worker 7*02ca8ccaSAndroid Build Coastguard Worker* ITM packet processing and decode. 8*02ca8ccaSAndroid Build Coastguard Worker-> ITM is primarily an M class SW trace module. I wouldn't expect to see it on 9*02ca8ccaSAndroid Build Coastguard Worker systems with STM, unless a companion M class was present. 10*02ca8ccaSAndroid Build Coastguard Worker 11*02ca8ccaSAndroid Build Coastguard Worker*Data trace - ETMv4 / ETMv3 12*02ca8ccaSAndroid Build Coastguard Worker-> Differing solutions to data trace in v4/v3 - v4 is separate trace stream 13*02ca8ccaSAndroid Build Coastguard Worker completely, output at trace ID <instruction_trace_ID>+1. ETMv3 is inline with 14*02ca8ccaSAndroid Build Coastguard Worker the instruction trace. 15*02ca8ccaSAndroid Build Coastguard Worker 16*02ca8ccaSAndroid Build Coastguard WorkerCortex-A cores do not support this architecturally. On R and M profile cores it 17*02ca8ccaSAndroid Build Coastguard Workeris an option. There are scenarios in future that could see linux on R cores, plus 18*02ca8ccaSAndroid Build Coastguard Workeron something like Juno it is possible to switch on trace for the SCP 19*02ca8ccaSAndroid Build Coastguard Worker(M class processor). So at some point data trace may be required. 20