1 /*
2 * Copyright (c) 2017-2020 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "src/runtime/Utils.h"
25
26 #include "arm_compute/runtime/NEON/NEScheduler.h"
27
28 #include <cmath>
29 #include <map>
30 #include <string>
31
32 namespace arm_compute
33 {
34 namespace utils
35 {
36 #ifndef DOXYGEN_SKIP_THIS
37 static const std::string information =
38 #include "arm_compute_version.embed"
39 ;
40 #endif /* DOXYGEN_SKIP_THIS */
41
string_from_scheduler_type(Scheduler::Type t)42 const std::string &string_from_scheduler_type(Scheduler::Type t)
43 {
44 static std::map<Scheduler::Type, const std::string> scheduler_type_map =
45 {
46 { Scheduler::Type::ST, "Single Thread" },
47 { Scheduler::Type::CPP, "C++11 Threads" },
48 { Scheduler::Type::OMP, "OpenMP Threads" },
49 { Scheduler::Type::CUSTOM, "Custom" }
50 };
51
52 return scheduler_type_map[t];
53 }
54
schedule_kernel_on_ctx(IRuntimeContext * ctx,ICPPKernel * kernel,const IScheduler::Hints & hints)55 void schedule_kernel_on_ctx(IRuntimeContext *ctx, ICPPKernel *kernel, const IScheduler::Hints &hints)
56 {
57 if(ctx)
58 {
59 ARM_COMPUTE_ERROR_ON(ctx->scheduler() == nullptr);
60 ctx->scheduler()->schedule(kernel, hints);
61 }
62 else
63 {
64 NEScheduler::get().schedule(kernel, hints);
65 }
66 }
67
calculate_number_of_stages_only_x_axis(size_t input_x_dimension,unsigned int axis)68 unsigned int calculate_number_of_stages_only_x_axis(size_t input_x_dimension, unsigned int axis)
69 {
70 // We need only 1 stage for all axis except x-axis
71 if(axis != 0)
72 {
73 return 1;
74 }
75 // Calculate number of WGs. 16 elements per thread, 8 threads per WG
76 const auto num_of_wg = static_cast<unsigned int>(ceil(input_x_dimension / 128.f));
77
78 // Calculate number of stages. First stage performs op and the rest reduction sum
79 // depending on the size of the input. Last stage should have only 1 WG.
80 const unsigned int num_of_stages = num_of_wg / 128 + 2;
81 return num_of_stages;
82 }
83 } // namespace utils
84 } // namespace arm_compute
85