xref: /aosp_15_r20/bionic/libc/kernel/uapi/asm-riscv/asm/ptrace.h (revision 8d67ca893c1523eb926b9080dbe4e2ffd2a27ba1)

/*
 * This file is auto-generated. Modifications will be lost.
 *
 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
 * for more information.
 */
#ifndef _UAPI_ASM_RISCV_PTRACE_H
#define _UAPI_ASM_RISCV_PTRACE_H
#ifndef __ASSEMBLY__
#include <linux/types.h>
#define PTRACE_GETFDPIC 33
#define PTRACE_GETFDPIC_EXEC 0
#define PTRACE_GETFDPIC_INTERP 1
struct user_regs_struct {
  unsigned long pc;
  unsigned long ra;
  unsigned long sp;
  unsigned long gp;
  unsigned long tp;
  unsigned long t0;
  unsigned long t1;
  unsigned long t2;
  unsigned long s0;
  unsigned long s1;
  unsigned long a0;
  unsigned long a1;
  unsigned long a2;
  unsigned long a3;
  unsigned long a4;
  unsigned long a5;
  unsigned long a6;
  unsigned long a7;
  unsigned long s2;
  unsigned long s3;
  unsigned long s4;
  unsigned long s5;
  unsigned long s6;
  unsigned long s7;
  unsigned long s8;
  unsigned long s9;
  unsigned long s10;
  unsigned long s11;
  unsigned long t3;
  unsigned long t4;
  unsigned long t5;
  unsigned long t6;
};
struct __riscv_f_ext_state {
  __u32 f[32];
  __u32 fcsr;
};
struct __riscv_d_ext_state {
  __u64 f[32];
  __u32 fcsr;
};
struct __riscv_q_ext_state {
  __u64 f[64] __attribute__((aligned(16)));
  __u32 fcsr;
  __u32 reserved[3];
};
struct __riscv_ctx_hdr {
  __u32 magic;
  __u32 size;
};
struct __riscv_extra_ext_header {
  __u32 __padding[129] __attribute__((aligned(16)));
  __u32 reserved;
  struct __riscv_ctx_hdr hdr;
};
union __riscv_fp_state {
  struct __riscv_f_ext_state f;
  struct __riscv_d_ext_state d;
  struct __riscv_q_ext_state q;
};
struct __riscv_v_ext_state {
  unsigned long vstart;
  unsigned long vl;
  unsigned long vtype;
  unsigned long vcsr;
  unsigned long vlenb;
  void * datap;
};
struct __riscv_v_regset_state {
  unsigned long vstart;
  unsigned long vl;
  unsigned long vtype;
  unsigned long vcsr;
  unsigned long vlenb;
  char vreg[];
};
#define RISCV_MAX_VLENB (8192)
#endif
#endif