1package xiangshan.backend.issue 2 3import chipsalliance.rocketchip.config.Parameters 4import freechips.rocketchip.diplomacy.LazyModule 5import top.{ArgParser, BaseConfig, Generator} 6import xiangshan.{XSCoreParameters, XSCoreParamsKey} 7 8object IssueQueueMain extends App { 9 override def main(args: Array[String]): Unit = { 10 val (config, firrtlOpts, firrtlComplier) = ArgParser.parse(args) 11 val backendParams = config(XSCoreParamsKey).backendParams 12 13 val iqParams: IssueBlockParams = backendParams.intSchdParams.get.issueBlockParams.head 14 val iq: IssueQueue = LazyModule(new IssueQueue(iqParams)(config.alterPartial({ case XSCoreParamsKey => XSCoreParameters() }))) 15 16 Generator.execute( 17 firrtlOpts, 18 iq.module, 19 firrtlComplier 20 ) 21 } 22 23} 24