1730cfbc0SXuan Hupackage xiangshan.backend 2730cfbc0SXuan Hu 3730cfbc0SXuan Huimport chipsalliance.rocketchip.config.Parameters 4730cfbc0SXuan Huimport freechips.rocketchip.diplomacy.LazyModule 5730cfbc0SXuan Huimport top.{ArgParser, BaseConfig, Generator} 6*8a00ff56SXuan Huimport xiangshan.backend.regfile.IntPregParams 7*8a00ff56SXuan Huimport xiangshan.{XSCoreParameters, XSCoreParamsKey, XSTileKey} 8730cfbc0SXuan Hu 9730cfbc0SXuan Huobject BackendMain extends App { 10730cfbc0SXuan Hu override def main(args: Array[String]): Unit = { 11*8a00ff56SXuan Hu val (config, firrtlOpts, firrtlComplier, firtoolOpts) = ArgParser.parse(args) 12730cfbc0SXuan Hu 13*8a00ff56SXuan Hu val defaultConfig = config.alterPartial({ 14*8a00ff56SXuan Hu // Get XSCoreParams and pass it to the "small module" 15*8a00ff56SXuan Hu case XSCoreParamsKey => config(XSTileKey).head 16*8a00ff56SXuan Hu }) 17*8a00ff56SXuan Hu 18*8a00ff56SXuan Hu val backendParams = defaultConfig(XSCoreParamsKey).backendParams 19*8a00ff56SXuan Hu val backend = LazyModule(new Backend(backendParams)(defaultConfig)) 20730cfbc0SXuan Hu 21730cfbc0SXuan Hu Generator.execute( 22730cfbc0SXuan Hu firrtlOpts, 23*8a00ff56SXuan Hu backend.module, 24*8a00ff56SXuan Hu firrtlComplier, 25*8a00ff56SXuan Hu firtoolOpts 26730cfbc0SXuan Hu ) 27730cfbc0SXuan Hu println("done") 28730cfbc0SXuan Hu } 29730cfbc0SXuan Hu} 30730cfbc0SXuan Hu 31