1package xiangshan 2 3import chisel3._ 4import chiseltest._ 5import chiseltest.{VerilatorBackendAnnotation, WriteVcdAnnotation} 6import chiseltest.simulator.{VerilatorCFlags, VerilatorFlags} 7import test.types.AnnotationSeq 8import org.scalatest.flatspec._ 9import org.scalatest.matchers.should._ 10import top.{ArgParser, DefaultConfig} 11 12abstract class XSTester extends AnyFlatSpec with ChiselScalatestTester with Matchers with HasTestAnnos { 13 behavior of "XiangShan Module" 14 val defaultConfig = (new DefaultConfig) 15 implicit val config = defaultConfig.alterPartial({ 16 // Get XSCoreParams and pass it to the "small module" 17 case XSCoreParamsKey => defaultConfig(XSTileKey).head.copy( 18 // Example of how to change params 19 IssQueSize = 12 20 ) 21 }) 22} 23 24trait HasTestAnnos { 25 var testAnnos: AnnotationSeq = Seq() 26} 27 28trait DumpVCD { this: HasTestAnnos => 29 testAnnos = testAnnos :+ WriteVcdAnnotation 30} 31 32trait UseVerilatorBackend { this: HasTestAnnos => 33 testAnnos = testAnnos :+ VerilatorBackendAnnotation 34} 35