xref: /XiangShan/src/main/scala/xiangshan/transforms/PrintModuleName.scala (revision 6639e9a467468f4e1b05a25a5de4500772aedeb1)
1/***************************************************************************************
2* Copyright (c) 2024 Beijing Institute of Open Source Chip (BOSC)
3* Copyright (c) 2020-2024 Institute of Computing Technology, Chinese Academy of Sciences
4* Copyright (c) 2020-2021 Peng Cheng Laboratory
5*
6* XiangShan is licensed under Mulan PSL v2.
7* You can use this software according to the terms and conditions of the Mulan PSL v2.
8* You may obtain a copy of Mulan PSL v2 at:
9*          http://license.coscl.org.cn/MulanPSL2
10*
11* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
12* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
13* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
14*
15* See the Mulan PSL v2 for more details.
16***************************************************************************************/
17
18package xiangshan.transforms
19
20class PrintModuleName extends firrtl.options.Phase {
21
22  override def invalidates(a: firrtl.options.Phase) = false
23
24  override def transform(annotations: firrtl.AnnotationSeq): firrtl.AnnotationSeq = {
25
26    import xiangshan.transforms.Helpers._
27
28    val (Seq(circuitAnno: firrtl.stage.FirrtlCircuitAnnotation), otherAnnos) = annotations.partition {
29      case _: firrtl.stage.FirrtlCircuitAnnotation => true
30      case _ => false
31    }
32    val c = circuitAnno.circuit
33
34    def onStmt(s: firrtl.ir.Statement): firrtl.ir.Statement = s match {
35      case firrtl.ir.Print(info, firrtl.ir.StringLit(string), args, clk, en) =>
36        firrtl.ir.Print(info, firrtl.ir.StringLit(string.replace(utility.XSLog.MagicStr, "%m")), args, clk, en)
37      case other: firrtl.ir.Statement =>
38        other.mapStmt(onStmt)
39    }
40
41    firrtl.stage.FirrtlCircuitAnnotation(c.mapModule(m => m.mapStmt(onStmt))) +: otherAnnos
42  }
43}
44