xref: /XiangShan/src/main/scala/xiangshan/package.scala (revision a8e04b1d1d859f10a5d730c56d85c9f36f5132b7)
19a2e6b8aSLinJiaweiimport chisel3._
29a2e6b8aSLinJiaweiimport chisel3.util._
39a2e6b8aSLinJiawei
49a2e6b8aSLinJiaweipackage object xiangshan {
59ee9f926SYikeZhou  object SrcType {
69a2e6b8aSLinJiawei    def reg = "b00".U
79a2e6b8aSLinJiawei    def pc  = "b01".U
89a2e6b8aSLinJiawei    def imm = "b01".U
99a2e6b8aSLinJiawei    def fp  = "b10".U
1004b56283SZhangZifei
111a3df1feSYikeZhou    def DC = imm // Don't Care
124d24c305SYikeZhou
1304b56283SZhangZifei    def isReg(srcType: UInt) = srcType===reg
1404b56283SZhangZifei    def isPc(srcType: UInt) = srcType===pc
1504b56283SZhangZifei    def isImm(srcType: UInt) = srcType===imm
1604b56283SZhangZifei    def isFp(srcType: UInt) = srcType===fp
175c321a22SZhangZifei    def isPcImm(srcType: UInt) = isPc(srcType) || isImm(srcType)
185c321a22SZhangZifei    def isRegFp(srcType: UInt) = isReg(srcType) || isFp(srcType)
1904b56283SZhangZifei
209a2e6b8aSLinJiawei    def apply() = UInt(2.W)
219a2e6b8aSLinJiawei  }
229a2e6b8aSLinJiawei
239a2e6b8aSLinJiawei  object SrcState {
249a2e6b8aSLinJiawei    def busy    = "b00".U
259a2e6b8aSLinJiawei    def rdy     = "b01".U
269a2e6b8aSLinJiawei    def specRdy = "b10".U // speculative ready, for future use
279a2e6b8aSLinJiawei    def apply() = UInt(2.W)
289a2e6b8aSLinJiawei  }
299a2e6b8aSLinJiawei
309a2e6b8aSLinJiawei  object FuType extends HasXSParameter {
31cafb3558SLinJiawei    def num           = exuParameters.NRFuType
32cafb3558SLinJiawei
33cafb3558SLinJiawei    def jmp          = "b0000".U
34cafb3558SLinJiawei    def i2f          = "b0001".U
35cafb3558SLinJiawei    def csr          = "b0010".U
36cafb3558SLinJiawei    def alu          = "b0011".U
37cafb3558SLinJiawei    def mul          = "b0100".U
38cafb3558SLinJiawei    def div          = "b0101".U
39b8f08ca0SZhangZifei    def fence        = "b0110".U
40cafb3558SLinJiawei
41cafb3558SLinJiawei    def fmac         = "b1000".U
42cafb3558SLinJiawei    def fmisc        = "b1001".U
43cafb3558SLinJiawei    def fDivSqrt     = "b1010".U
44cafb3558SLinJiawei
45cafb3558SLinJiawei    def ldu          = "b1100".U
46cafb3558SLinJiawei    def stu          = "b1101".U
473366070dSWilliam Wang    def mou          = "b1110".U // for amo, lr, sc, fence
489a2e6b8aSLinJiawei
499a2e6b8aSLinJiawei    def apply() = UInt(log2Up(num).W)
509a2e6b8aSLinJiawei
51cafb3558SLinJiawei    def isIntExu(fuType: UInt) = !fuType(3)
526ac289b3SLinJiawei    def isJumpExu(fuType: UInt) = fuType === jmp
53cafb3558SLinJiawei    def isFpExu(fuType: UInt) = fuType(3, 2) === "b10".U
54cafb3558SLinJiawei    def isMemExu(fuType: UInt) = fuType(3, 2) === "b11".U
553366070dSWilliam Wang    def isLoadExu(fuType: UInt) = fuType === ldu || fuType === mou
56de593423SWilliam Wang    def isStoreExu(fuType: UInt) = fuType === stu
57cafb3558SLinJiawei
58cafb3558SLinJiawei    val functionNameMap = Map(
59cafb3558SLinJiawei      jmp.litValue() -> "jmp",
60cafb3558SLinJiawei      i2f.litValue() -> "int to float",
61cafb3558SLinJiawei      csr.litValue() -> "csr",
62cafb3558SLinJiawei      alu.litValue() -> "alu",
63cafb3558SLinJiawei      mul.litValue() -> "mul",
64cafb3558SLinJiawei      div.litValue() -> "div",
65b8f08ca0SZhangZifei      fence.litValue() -> "fence",
66cafb3558SLinJiawei      fmac.litValue() -> "fmac",
67cafb3558SLinJiawei      fmisc.litValue() -> "fmisc",
68cafb3558SLinJiawei      fDivSqrt.litValue() -> "fdiv/fsqrt",
69cafb3558SLinJiawei      ldu.litValue() -> "load",
70cafb3558SLinJiawei      stu.litValue() -> "store"
71cafb3558SLinJiawei    )
72cafb3558SLinJiawei
739a2e6b8aSLinJiawei  }
749a2e6b8aSLinJiawei
759a2e6b8aSLinJiawei  object FuOpType extends HasXSParameter {
76cafb3558SLinJiawei    def apply() = UInt(exuParameters.FuOpWidth.W)
779a2e6b8aSLinJiawei  }
78ebd97ecbSzhanglinjuan
79ebd97ecbSzhanglinjuan  object BTBtype {
80ebd97ecbSzhanglinjuan    def B = "b00".U  // branch
81ebd97ecbSzhanglinjuan    def J = "b01".U  // jump
82ebd97ecbSzhanglinjuan    def I = "b10".U  // indirect
83ebd97ecbSzhanglinjuan    def R = "b11".U  // return
84ebd97ecbSzhanglinjuan
85ebd97ecbSzhanglinjuan    def apply() = UInt(2.W)
86ebd97ecbSzhanglinjuan  }
87518d8658SYinan Xu
88a3edac52SYinan Xu  object CommitType {
89fe6452fcSYinan Xu    def NORMAL = "b00".U  // int/fp
90fe6452fcSYinan Xu    def BRANCH = "b01".U  // branch
91a3edac52SYinan Xu    def LOAD   = "b10".U  // load
92a3edac52SYinan Xu    def STORE  = "b11".U  // store
93518d8658SYinan Xu
94518d8658SYinan Xu    def apply() = UInt(2.W)
95a3edac52SYinan Xu    def isLoadStore(commitType: UInt) = commitType(1)
964fb541a1SYinan Xu    def lsInstIsStore(commitType: UInt) = commitType(0)
971abe60b3SYinan Xu    def isStore(commitType: UInt) = isLoadStore(commitType) && lsInstIsStore(commitType)
98fe6452fcSYinan Xu    def isBranch(commitType: UInt) = commitType(0) && !commitType(1)
99518d8658SYinan Xu  }
100bfb958a3SYinan Xu
101bfb958a3SYinan Xu  object RedirectLevel {
102bfb958a3SYinan Xu    def flushAfter = "b00".U
103bfb958a3SYinan Xu    def flush      = "b01".U
104bfb958a3SYinan Xu    def flushAll   = "b10".U
105bfb958a3SYinan Xu    def exception  = "b11".U
106bfb958a3SYinan Xu
107bfb958a3SYinan Xu    def apply() = UInt(2.W)
108bfb958a3SYinan Xu    def isUnconditional(level: UInt) = level(1)
109bfb958a3SYinan Xu    def flushItself(level: UInt) = level(0)
110bfb958a3SYinan Xu    def isException(level: UInt) = level(1) && level(0)
111bfb958a3SYinan Xu  }
112baf8def6SYinan Xu
113baf8def6SYinan Xu  object ExceptionVec {
114baf8def6SYinan Xu    def apply() = Vec(16, Bool())
115baf8def6SYinan Xu  }
116*a8e04b1dSYinan Xu
117c60c1ab4SWilliam Wang  object PMAMode {
1188d9a04fcSWilliam Wang    def R = "b1".U << 0 //readable
1198d9a04fcSWilliam Wang    def W = "b1".U << 1 //writeable
1208d9a04fcSWilliam Wang    def X = "b1".U << 2 //executable
1218d9a04fcSWilliam Wang    def I = "b1".U << 3 //cacheable: icache
1228d9a04fcSWilliam Wang    def D = "b1".U << 4 //cacheable: dcache
1238d9a04fcSWilliam Wang    def S = "b1".U << 5 //enable speculative access
124cff68e26SWilliam Wang    def A = "b1".U << 6 //enable atomic operation, A imply R & W
1258d9a04fcSWilliam Wang    def C = "b1".U << 7 //if it is cacheable is configable
126c60c1ab4SWilliam Wang    def Reserved = "b0".U
127c60c1ab4SWilliam Wang
128c60c1ab4SWilliam Wang    def apply() = UInt(7.W)
129c60c1ab4SWilliam Wang
130c60c1ab4SWilliam Wang    def read(mode: UInt) = mode(0)
131c60c1ab4SWilliam Wang    def write(mode: UInt) = mode(1)
132c60c1ab4SWilliam Wang    def execute(mode: UInt) = mode(2)
133c60c1ab4SWilliam Wang    def icache(mode: UInt) = mode(3)
134c60c1ab4SWilliam Wang    def dcache(mode: UInt) = mode(4)
135c60c1ab4SWilliam Wang    def speculate(mode: UInt) = mode(5)
136c60c1ab4SWilliam Wang    def atomic(mode: UInt) = mode(6)
137c60c1ab4SWilliam Wang    def configable_cache(mode: UInt) = mode(7)
138c60c1ab4SWilliam Wang
139c60c1ab4SWilliam Wang    def strToMode(s: String) = {
140c60c1ab4SWilliam Wang      var result = 0.U << 8
141c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("R") >= 0) result = result + R
142c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("W") >= 0) result = result + W
143c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("X") >= 0) result = result + X
144c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("I") >= 0) result = result + I
145c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("D") >= 0) result = result + D
146c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("S") >= 0) result = result + S
147c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("A") >= 0) result = result + A
148c60c1ab4SWilliam Wang      if (s.toUpperCase.indexOf("C") >= 0) result = result + C
149c60c1ab4SWilliam Wang      result
150c60c1ab4SWilliam Wang    }
151c60c1ab4SWilliam Wang  }
1529a2e6b8aSLinJiawei}
153