1package xiangshan.backend.issue 2 3import chisel3._ 4import chisel3.util._ 5import fudian.utils.SignExt 6import xiangshan.SelImm 7import xiangshan.backend.decode.ImmUnion 8import xiangshan.backend.datapath.DataConfig._ 9 10import scala.collection.MapView 11 12class ImmExtractorIO(dataBits: Int) extends Bundle { 13 val in = Input(new Bundle { 14 val imm = UInt(32.W) 15 val immType = SelImm() 16 }) 17 val out = Output(new Bundle { 18 val imm = UInt(dataBits.W) 19 }) 20} 21 22class ImmExtractor(dataBits: Int, immTypeSet: Set[BigInt]) extends Module { 23 val io = IO(new ImmExtractorIO(dataBits)) 24 25 val extractMap = Map( 26 SelImm.IMM_I .litValue -> SignExt(ImmUnion.I .toImm32(io.in.imm), IntData().dataWidth), 27 SelImm.IMM_S .litValue -> SignExt(ImmUnion.S .toImm32(io.in.imm), IntData().dataWidth), 28 SelImm.IMM_SB .litValue -> SignExt(ImmUnion.B .toImm32(io.in.imm), IntData().dataWidth), 29 SelImm.IMM_U .litValue -> SignExt(ImmUnion.U .toImm32(io.in.imm), IntData().dataWidth), 30 SelImm.IMM_UJ .litValue -> SignExt(ImmUnion.J .toImm32(io.in.imm), IntData().dataWidth), 31 SelImm.IMM_Z .litValue -> SignExt(ImmUnion.Z .toImm32(io.in.imm), IntData().dataWidth), 32 SelImm.IMM_B6 .litValue -> SignExt(ImmUnion.B6 .toImm32(io.in.imm), IntData().dataWidth), 33 SelImm.IMM_VSETVLI .litValue -> SignExt(ImmUnion.VSETVLI .toImm32(io.in.imm), IntData().dataWidth), 34 SelImm.IMM_VSETIVLI .litValue -> SignExt(ImmUnion.VSETIVLI.toImm32(io.in.imm), IntData().dataWidth), 35 SelImm.IMM_OPIVIS .litValue -> SignExt(ImmUnion.OPIVIS .toImm32(io.in.imm), IntData().dataWidth), 36 SelImm.IMM_OPIVIU .litValue -> SignExt(ImmUnion.OPIVIU .toImm32(io.in.imm), IntData().dataWidth), 37 SelImm.IMM_LUI32 .litValue -> SignExt(ImmUnion.LUI32 .toImm32(io.in.imm), IntData().dataWidth), 38 ) 39 40 val usedMap: Map[BigInt, UInt] = extractMap.view.filterKeys(x => immTypeSet.contains(x)).toMap 41 println(usedMap) 42 43 io.out.imm := MuxLookup(io.in.immType, 0.U)(usedMap.map { case (k, v) => (k.U, v) }.toSeq) 44} 45 46object ImmExtractor { 47 def apply(imm: UInt, immType: UInt, dataBits: Int, immTypeSet: Set[BigInt]): UInt = { 48 val mod = Module(new ImmExtractor(dataBits, immTypeSet)) 49 mod.io.in.imm := imm 50 mod.io.in.immType := immType 51 mod.io.out.imm 52 } 53} 54