13ebdf758SXuan Hu///**************************************************************************************** 23ebdf758SXuan Hu// * Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 33ebdf758SXuan Hu// * Copyright (c) 2020-2021 Peng Cheng Laboratory 43ebdf758SXuan Hu// * 53ebdf758SXuan Hu// * XiangShan is licensed under Mulan PSL v2. 63ebdf758SXuan Hu// * You can use this software according to the terms and conditions of the Mulan PSL v2. 73ebdf758SXuan Hu// * You may obtain a copy of Mulan PSL v2 at: 83ebdf758SXuan Hu// * http://license.coscl.org.cn/MulanPSL2 93ebdf758SXuan Hu// * 103ebdf758SXuan Hu// * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 113ebdf758SXuan Hu// * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 123ebdf758SXuan Hu// * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 133ebdf758SXuan Hu// * 143ebdf758SXuan Hu// * See the Mulan PSL v2 for more details. 153ebdf758SXuan Hu// **************************************************************************************** 163ebdf758SXuan Hu// */ 173ebdf758SXuan Hu// 183ebdf758SXuan Hu// 193ebdf758SXuan Hu//package xiangshan.backend.fu.vector 203ebdf758SXuan Hu// 21*83ba63b3SXuan Hu//import org.chipsalliance.cde.config.Parameters 223ebdf758SXuan Hu//import chisel3._ 233ebdf758SXuan Hu//import utils._ 243ebdf758SXuan Hu//import yunsuan.vector.mac.VIMac 253ebdf758SXuan Hu//import yunsuan.VimacType 263ebdf758SXuan Hu//import xiangshan.{XSCoreParamsKey, FuType} 273ebdf758SXuan Hu// 283ebdf758SXuan Hu// 293ebdf758SXuan Hu// 303ebdf758SXuan Hu//class VIMacWrapper(implicit p: Parameters) extends VPUDataModule { 313ebdf758SXuan Hu// 323ebdf758SXuan Hu// needReverse := false.B 333ebdf758SXuan Hu// needClearMask := false.B 343ebdf758SXuan Hu// 353ebdf758SXuan Hu// // connect VIMac 363ebdf758SXuan Hu// val vImac = Module(new VIMac) 373ebdf758SXuan Hu// vImac.io.in.valid := io.in.valid 383ebdf758SXuan Hu// vImac.io.in.bits.opcode := VimacType.getOpcode(in.uop.ctrl.fuOpType).asTypeOf(vImac.io.in.bits.opcode) 393ebdf758SXuan Hu// vImac.io.in.bits.info.vm := in.uop.ctrl.vm 403ebdf758SXuan Hu// vImac.io.in.bits.info.ma := in.uop.ctrl.vconfig.vtype.vma 413ebdf758SXuan Hu// vImac.io.in.bits.info.ta := in.uop.ctrl.vconfig.vtype.vta 423ebdf758SXuan Hu// vImac.io.in.bits.info.vlmul := in.uop.ctrl.vconfig.vtype.vlmul 433ebdf758SXuan Hu// vImac.io.in.bits.info.vl := in.uop.ctrl.vconfig.vl 443ebdf758SXuan Hu// vImac.io.in.bits.info.vstart := vstart // TODO : 453ebdf758SXuan Hu// vImac.io.in.bits.info.uopIdx := in.uop.ctrl.uopIdx 463ebdf758SXuan Hu// vImac.io.in.bits.info.vxrm := vxrm 473ebdf758SXuan Hu// 483ebdf758SXuan Hu// val srcVdType = Wire(new Bundle{ 493ebdf758SXuan Hu// val srcType2 = UInt(4.W) 503ebdf758SXuan Hu// val srcType1 = UInt(4.W) 513ebdf758SXuan Hu// val vdType = UInt(4.W) 523ebdf758SXuan Hu// }) 533ebdf758SXuan Hu// srcVdType := VimacType.getSrcVdType(in.uop.ctrl.fuOpType, in.uop.ctrl.vconfig.vtype.vsew(1,0)).asTypeOf(srcVdType.cloneType) 543ebdf758SXuan Hu// vImac.io.in.bits.srcType(0) := srcVdType.srcType2 553ebdf758SXuan Hu// vImac.io.in.bits.srcType(1) := srcVdType.srcType1 563ebdf758SXuan Hu// vImac.io.in.bits.vdType := srcVdType.vdType 573ebdf758SXuan Hu// vImac.io.in.bits.vs1 := vs1 583ebdf758SXuan Hu// vImac.io.in.bits.vs2 := vs2 593ebdf758SXuan Hu// vImac.io.in.bits.old_vd := in.src(2) 603ebdf758SXuan Hu// vImac.io.in.bits.mask := mask 613ebdf758SXuan Hu// 623ebdf758SXuan Hu// // connect io 633ebdf758SXuan Hu// io.out.bits.data := vImac.io.out.bits.vd 643ebdf758SXuan Hu// vxsat := vImac.io.out.bits.vxsat 653ebdf758SXuan Hu// io.out.valid := vImac.io.out.valid 663ebdf758SXuan Hu//} 673ebdf758SXuan Hu// 683ebdf758SXuan Hu//class VIMacU(implicit p: Parameters) extends VPUSubModule(p(XSCoreParamsKey).VLEN) { 693ebdf758SXuan Hu// XSError(io.in.valid && io.in.bits.uop.ctrl.fuOpType === VimacType.dummy, "Vimac OpType not supported") 703ebdf758SXuan Hu// override val dataModule = Seq(Module(new VIMacWrapper)) 713ebdf758SXuan Hu// override val select = Seq( 723ebdf758SXuan Hu// io.in.bits.uop.ctrl.fuType === FuType.vimac 733ebdf758SXuan Hu// ) 743ebdf758SXuan Hu// connectDataModule 753ebdf758SXuan Hu//} 76