1package xiangshan.backend.decode 2 3import chipsalliance.rocketchip.config.Parameters 4import chisel3._ 5import chisel3.util.BitPat.bitPatToUInt 6import chisel3.util._ 7import freechips.rocketchip.util.uintToBitPat 8import freechips.rocketchip.rocket.Instructions._ 9import utils._ 10import xiangshan.ExceptionNO.illegalInstr 11import xiangshan._ 12import yunsuan.{VfpuType, VipuType, VppuType} 13 14abstract class VecDecode extends XSDecodeBase { 15 def generate() : List[BitPat] 16 def asOldDecodeOutput(): List[BitPat] = { 17 val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 18 List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm) 19 } 20 def asFirstStageDecodeOutput(): List[BitPat] = { 21 val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 22 List (src1, src2, src3, fu, fuOp, xWen, fWen, bitPatToUInt(vWen) | bitPatToUInt(mWen), xsTrap, noSpec, blockBack, flushPipe, selImm) 23 } 24} 25 26case class OPIVV(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, uopDivType: BitPat = UopDivType.VEC_LMUL) extends XSDecodeBase { 27 def generate() : List[BitPat] = { 28 XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType, 29 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 30 } 31} 32 33case class OPIVX(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, uopDivType: BitPat = UopDivType.VEC_MV_LMUL) extends XSDecodeBase { 34 def generate() : List[BitPat] = { 35 XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType, 36 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 37 } 38} 39 40case class OPIVI(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, selImm: BitPat, uopDivType: BitPat = UopDivType.VEC_LMUL) extends XSDecodeBase { 41 def generate() : List[BitPat] = { 42 XSDecode(SrcType.imm, SrcType.vp, src3, fu, fuOp, selImm, uopDivType, 43 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 44 } 45} 46 47case class OPMVV(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase { 48 private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 49 def generate() : List[BitPat] = { 50 XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, uopDivType, SelImm.X, xWen, F, vWen, mWen, F, F, F, F).generate() 51 } 52} 53 54case class OPMVX(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase { 55 private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 56 def generate() : List[BitPat] = { 57 XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType, 58 xWen = xWen, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 59 } 60} 61 62case class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase { 63 def generate() : List[BitPat] = { 64 XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType, 65 xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 66 } 67} 68 69case class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase { 70 def generate() : List[BitPat] = { 71 XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType, 72 xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 73 } 74} 75 76case class VSET(vli: Boolean, vtypei: Boolean, fuOp: BitPat, flushPipe: Boolean, selImm: BitPat, uopDivType: BitPat = UopDivType.DIR) extends XSDecodeBase { 77 def generate() : List[BitPat] = { 78 val src1 = if (vli) SrcType.imm else SrcType.xp 79 val src2 = if (vtypei) SrcType.imm else SrcType.xp 80 XSDecode(src1, src2, SrcType.X, FuType.alu, fuOp, selImm, uopDivType, 81 xWen = T, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = flushPipe).generate() 82 } 83} 84 85case class VLD(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, ff: Boolean = false, 86 mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase { 87 def generate() : List[BitPat] = { 88 val fu = FuType.vldu 89 val src1 = SrcType.xp 90 val src3 = SrcType.X 91 XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, uopDivType, 92 xWen = F, fWen = F, vWen = T, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 93 } 94} 95 96case class VST(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, 97 mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase { 98 def generate() : List[BitPat] = { 99 val fu = FuType.vstu 100 val src1 = SrcType.xp 101 val src3 = SrcType.vp 102 XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, uopDivType, 103 xWen = F, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 104 } 105} 106 107object VecDecoder extends DecodeConstants { 108 val opivv: Array[(BitPat, XSDecodeBase)] = Array( 109 VADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.add, T, F, F), 110 VSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.sub, T, F, F), 111 112 VMINU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 113 VMIN_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 114 VMAXU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 115 VMAX_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 116 117 VAND_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 118 VOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 119 VXOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 120 121 VRGATHER_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 122 VRGATHEREI16_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 123 124 VADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.adc, T, F, F), 125 VMADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.madc, F, T, F), 126 VMADC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.madc0, F, T, F), 127 128 VSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 129 VMSBC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 130 VMSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 131 132 VMERGE_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 133 134 VMSEQ_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 135 VMSNE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 136 VMSLTU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 137 VMSLT_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 138 VMSLEU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 139 VMSLE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 140 141 VSLL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 142 VSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 143 VSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 144 VNSRL_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 145 VNSRA_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 146 147 VSADDU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 148 VSADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 149 VSSUBU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 150 VSSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 151 152 VSMUL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 153 154 VSSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 155 VSSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 156 157 VNCLIPU_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 158 VNCLIP_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 159 160 VWREDSUMU_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 161 VWREDSUM_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 162 ) 163 164 val opivx: Array[(BitPat, XSDecodeBase)] = Array( 165 VADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.add, T, F, F), 166 VSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.sub, T, F, F), 167 VRSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.rsub, T, F, F), 168 169 VMINU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 170 VMIN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 171 VMAXU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 172 VMAX_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 173 174 VAND_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 175 VOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 176 VXOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 177 178 VRGATHER_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 179 180 VSLIDEUP_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 181 VSLIDEDOWN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 182 183 VADC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.adc, T, F, F), 184 VMADC_VXM -> OPIVX(SrcType.X, FuType.vipu, VipuType.madc, F, T, F), 185 VMADC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.madc0, F, T, F), 186 VSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 187 VMSBC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 188 VMSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 189 190 VMERGE_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 191 192 VMSEQ_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 193 VMSNE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 194 VMSLTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 195 VMSLT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 196 VMSLEU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 197 VMSLE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 198 VMSGTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 199 VMSGT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 200 201 VSLL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 202 VSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 203 VSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 204 VNSRL_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 205 VNSRA_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 206 207 VSADDU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 208 VSADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 209 VSSUBU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 210 VSSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 211 212 213 VSMUL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 214 215 VSSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 216 VSSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 217 218 VNCLIPU_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 219 VNCLIP_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 220 ) 221 222 val opivi: Array[(BitPat, XSDecodeBase)] = Array( 223 VADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.add, T, F, F, SelImm.IMM_OPIVIS), 224 VRSUB_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.rsub, T, F, F, SelImm.IMM_OPIVIS), 225 226 VAND_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 227 VOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 228 VXOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 229 230 VRGATHER_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 231 232 VSLIDEUP_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 233 VSLIDEDOWN_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 234 235 VADC_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.adc, T, F, F, SelImm.IMM_OPIVIS), 236 VMADC_VIM -> OPIVI(SrcType.X, FuType.vipu, VipuType.madc, T, F, F, SelImm.IMM_OPIVIS), 237 VMADC_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.madc0, T, F, F, SelImm.IMM_OPIVIS), 238 239 VMERGE_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 240 241 VMSEQ_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 242 VMSNE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 243 VMSLEU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 244 VMSLE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 245 VMSGTU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 246 VMSGT_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 247 248 VSLL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 249 VSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 250 VSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 251 VNSRL_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 252 VNSRA_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 253 254 VSADDU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 255 VSADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 256 257 VSSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 258 VSSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 259 260 VNCLIPU_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 261 VNCLIP_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 262 263 VMV1R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 264 VMV2R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 265 VMV4R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 266 VMV8R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 267 ) 268 269 val opmvv: Array[(BitPat, XSDecodeBase)] = Array( 270 VAADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 271 VAADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 272 VASUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 273 VASUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 274 VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 275 VCPOP_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 276 VDIV_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 277 VDIVU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 278 VFIRST_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 279 VID_V -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 280 VIOTA_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 281 282 // VMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 283 284 VMADD_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 285 VMAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 286 VMANDN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 287 VMNAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 288 VMNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 289 VMOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 290 VMORN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 291 VMXNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 292 VMXOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 293 VMSBF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 294 VMSIF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 295 VMSOF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 296 VMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 297 VMULH_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 298 VMULHSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 299 VMULHU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 300 301 VMV_X_S -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 302 VNMSAC_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 303 VNMSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 304 VREDAND_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 305 VREDMAX_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 306 VREDMAXU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 307 VREDMIN_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 308 VREDMINU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 309 VREDOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 310 VREDSUM_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 311 VREDXOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 312 VREM_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 313 VREMU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 314 VSEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 315 VSEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 316 VSEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 317 VZEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 318 VZEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 319 VZEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 320 VWADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 321 VWADD_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 322 VWADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 323 VWADDU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 324 VWMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 325 VWMACCSU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 326 VWMACCU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 327 VWMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 328 VWMULSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 329 VWMULU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 330 VWSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 331 VWSUB_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 332 VWSUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 333 VWSUBU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 334 ) 335 336 val opmvx: Array[(BitPat, XSDecodeBase)] = Array( 337 VAADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 338 VAADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 339 VASUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 340 VASUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 341 VDIV_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 342 VDIVU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 343 VMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 344 VMADD_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 345 VMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 346 VMULH_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 347 VMULHSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 348 VMULHU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 349 VMV_S_X -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 350 351 VNMSAC_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 352 VNMSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 353 VREM_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 354 VREMU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 355 356 VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 357 VSLIDE1UP_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 358 VWADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 359 VWADD_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 360 VWADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 361 VWADDU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 362 363 // OutOfMemoryError 364 VWMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 365 VWMACCSU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 366 VWMACCU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 367 368 VWMACCUS_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 369 VWMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 370 VWMULSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 371 // Ok 372 VWMULU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 373 VWSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 374 VWSUB_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 375 VWSUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 376 VWSUBU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 377 ) 378 379 val opfvv: Array[(BitPat, XSDecodeBase)] = Array( 380 // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 381 VFADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fadd , F, T, F), 382 VFSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fsub, F, T, F), 383 384 // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 385 VFWADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 386 VFWSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 387 VFWADD_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 388 VFWSUB_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 389 390 // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 391 VFMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 392 VFDIV_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fdiv , F, T, F), 393 394 // 13.5. Vector Widening Floating-Point Multiply 395 VFWMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 396 397 // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 398 VFMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.fmacc, F, T, F), 399 VFNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 400 VFMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 401 VFNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 402 VFMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 403 VFNMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 404 VFMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 405 VFNMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 406 407 // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 408 VFWMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 409 VFWNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 410 VFWMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 411 VFWNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 412 413 // 13.8. Vector Floating-Point Square-Root Instruction 414 VFSQRT_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 415 416 // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction 417 VFRSQRT7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 418 419 // 13.10. Vector Floating-Point Reciprocal Estimate Instruction 420 VFREC7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 421 422 // 13.11. Vector Floating-Point MIN/MAX Instructions 423 VFMIN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 424 VFMAX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 425 426 // 13.12. Vector Floating-Point Sign-Injection Instructions 427 VFSGNJ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 428 VFSGNJN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 429 VFSGNJX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 430 431 // 13.13. Vector Floating-Point Compare Instructions 432 VMFEQ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 433 VMFNE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 434 VMFLT_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 435 VMFLE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 436 437 // 13.14. Vector Floating-Point Classify Instruction 438 VFCLASS_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 439 440 // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions 441 VFCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 442 VFCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 443 VFCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 444 VFCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 445 VFCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 446 VFCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 447 448 // 13.18. Widening Floating-Point/Integer Type-Convert Instructions 449 VFWCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 450 VFWCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 451 VFWCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 452 VFWCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 453 VFWCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 454 VFWCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 455 VFWCVT_F_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 456 457 // ! 458 // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions 459 VFNCVT_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 460 VFNCVT_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 461 VFNCVT_RTZ_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 462 VFNCVT_RTZ_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 463 VFNCVT_F_XU_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 464 VFNCVT_F_X_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 465 VFNCVT_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 466 VFNCVT_ROD_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 467 468 // 14.3. Vector Single-Width Floating-Point Reduction Instructions 469 VFREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 470 VFREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 471 VFREDMAX_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 472 VFREDMIN_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 473 474 // 14.4. Vector Widening Floating-Point Reduction Instructions 475 VFWREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 476 VFWREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 477 478 // 16.2. Floating-Point Scalar Move Instructions 479 VFMV_F_S -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// f[rd] = vs2[0] (rs1=0) 480 ) 481 482 val opfvf: Array[(BitPat, XSDecodeBase)] = Array( 483 // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 484 VFADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fadd , F, T, F), 485 VFSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fsub, F, T, F), 486 VFRSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 487 488 // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 489 VFWADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 490 VFWSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 491 VFWADD_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 492 VFWSUB_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 493 494 // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 495 VFMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 496 VFDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fdiv , F, T, F), 497 VFRDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 498 499 // 13.5. Vector Widening Floating-Point Multiply 500 VFWMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 501 502 // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 503 VFMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.fmacc, F, T, F), 504 VFNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 505 VFMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 506 VFNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 507 VFMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 508 VFNMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 509 VFMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 510 VFNMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 511 512 // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 513 VFWMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 514 VFWNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 515 VFWMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 516 VFWNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 517 518 // 13.11. Vector Floating-Point MIN/MAX Instructions 519 VFMIN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 520 VFMAX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 521 522 // 13.12. Vector Floating-Point Sign-Injection Instructions 523 VFSGNJ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 524 VFSGNJN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 525 VFSGNJX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 526 527 // 13.13. Vector Floating-Point Compare Instructions 528 VMFEQ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 529 VMFNE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 530 VMFLT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 531 VMFLE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 532 VMFGT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 533 VMFGE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 534 535 // 13.15. Vector Floating-Point Merge Instruction 536 VFMERGE_VFM -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 537 538 // 13.16. Vector Floating-Point Move Instruction 539 VFMV_V_F -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// src2=SrcType.X 540 541 // 16.2. Floating-Point Scalar Move Instructions 542 VFMV_S_F -> OPFVF(SrcType.fp, SrcType.vp, FuType.vppu, VppuType.f2s , F, T, F),// vs2=0 // vs3 = vd 543 544 // 16.3.3. Vector Slide1up 545 VFSLIDE1UP_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vppu, VppuType.vslide1up, F, T, F),// vd[0]=f[rs1], vd[i+1] = vs2[i] 546 547 // 16.3.4. Vector Slide1down Instruction 548 // vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1] 549 VFSLIDE1DOWN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1] 550 ) 551 552 val vset: Array[(BitPat, XSDecodeBase)] = Array( 553 VSETVLI -> VSET(F, T, ALUOpType.vsetvli1, F, SelImm.IMM_VSETVLI), 554 VSETIVLI -> VSET(T, T, ALUOpType.vsetivli1, F, SelImm.IMM_VSETIVLI), 555 VSETVL -> VSET(F, F, ALUOpType.vsetvl1, T, SelImm.X), // flush pipe 556 ) 557 558 val vls: Array[(BitPat, XSDecodeBase)] = Array( 559 // 7.4. Vector Unit-Stride Instructions 560 VLE8_V -> VLD(SrcType.X, VlduType.dummy), 561 VLE16_V -> VLD(SrcType.X, VlduType.dummy), 562 VLE32_V -> VLD(SrcType.X, VlduType.dummy), 563 VLE64_V -> VLD(SrcType.X, VlduType.dummy), 564 VSE8_V -> VST(SrcType.X, VstuType.dummy), 565 VSE16_V -> VST(SrcType.X, VstuType.dummy), 566 VSE32_V -> VST(SrcType.X, VstuType.dummy), 567 VSE64_V -> VST(SrcType.X, VstuType.dummy), 568 VLM_V -> VLD(SrcType.X, VlduType.dummy, mask = T), 569 VSM_V -> VST(SrcType.X, VstuType.dummy, mask = T), 570 // 7.5. Vector Strided Instructions 571 VLSE8_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 572 VLSE16_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 573 VLSE32_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 574 VLSE64_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 575 VSSE8_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 576 VSSE16_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 577 VSSE32_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 578 VSSE64_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 579 // 7.6. Vector Indexed Instructions 580 VLUXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 581 VLUXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 582 VLUXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 583 VLUXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 584 VLOXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 585 VLOXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 586 VLOXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 587 VLOXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 588 VSUXEI8_V -> VLD(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 589 VSUXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 590 VSUXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 591 VSUXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 592 VSOXEI8_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 593 VSOXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 594 VSOXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 595 VSOXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 596 // 7.7. Unit-stride Fault-Only-First Loads 597 VLE8FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 598 VLE16FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 599 VLE32FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 600 VLE64FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 601 // 7.8. Vector Load/Store Segment Instructions 602 // 7.8.1. Vector Unit-Stride Segment Loads and Stores 603 // TODO 604 // 7.8.2. Vector Strided Segment Loads and Stores 605 // TODO 606 // 7.8.3. Vector Indexed Segment Loads and Stores 607 // TODO 608 // 7.9. Vector Load/Store Whole Register Instructions 609 VL1RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 610 VL1RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 611 VL1RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 612 VL1RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 613 VL2RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 614 VL2RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 615 VL2RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 616 VL2RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 617 VL4RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 618 VL4RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 619 VL4RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 620 VL4RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 621 VL8RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 622 VL8RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 623 VL8RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 624 VL8RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 625 VS1R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 626 VS2R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 627 VS4R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 628 VS8R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 629 ) 630 631 override val decodeArray: Array[(BitPat, XSDecodeBase)] = vset ++ vls ++ 632 opivv ++ opivx ++ opivi ++ opmvv ++ opmvx ++ opfvv ++ opfvf 633} 634