1package xiangshan.backend.decode 2 3import chisel3.util.BitPat.bitPatToUInt 4import chisel3.util._ 5import freechips.rocketchip.rocket.Instructions._ 6import freechips.rocketchip.util.uintToBitPat 7import xiangshan._ 8import xiangshan.backend.fu.FuType 9import yunsuan.{VfpuType, VipuType} 10 11abstract class VecDecode extends XSDecodeBase { 12 def generate() : List[BitPat] 13 def asOldDecodeOutput(): List[BitPat] = { 14 val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 15 List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm) 16 } 17 def asFirstStageDecodeOutput(): List[BitPat] = { 18 val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 19 List (src1, src2, src3, fu, fuOp, xWen, fWen, bitPatToUInt(vWen) | bitPatToUInt(mWen), xsTrap, noSpec, blockBack, flushPipe, selImm) 20 } 21} 22 23case class OPIVV(src3: BitPat, fu: Int, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 24 def generate() : List[BitPat] = { 25 XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, 26 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 27 } 28} 29 30case class OPIVX(src3: BitPat, fu: Int, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 31 def generate() : List[BitPat] = { 32 XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 33 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 34 } 35} 36 37case class OPIVI(src3: BitPat, fu: Int, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, selImm: BitPat) extends XSDecodeBase { 38 def generate() : List[BitPat] = { 39 XSDecode(SrcType.imm, SrcType.vp, src3, fu, fuOp, selImm, 40 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 41 } 42} 43 44case class OPMVV(vdRen: Boolean, fu: Int, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 45 private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 46 def generate() : List[BitPat] = { 47 XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, xWen, F, vWen, mWen, F, F, F, F).generate() 48 } 49} 50 51case class OPMVX(vdRen: Boolean, fu: Int, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 52 private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 53 def generate() : List[BitPat] = { 54 XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 55 xWen = xWen, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 56 } 57} 58 59case class OPFVV(src1:BitPat, src3:BitPat, fu: Int, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 60 def generate() : List[BitPat] = { 61 XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 62 xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 63 } 64} 65 66case class OPFVF(src1:BitPat, src3:BitPat, fu: Int, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 67 def generate() : List[BitPat] = { 68 XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 69 xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 70 } 71} 72 73case class VSET(vli: Boolean, vtypei: Boolean, fuOp: BitPat, flushPipe: Boolean, selImm: BitPat) extends XSDecodeBase { 74 def generate() : List[BitPat] = { 75 val src1 = if (vli) SrcType.imm else SrcType.xp 76 val src2 = if (vtypei) SrcType.imm else SrcType.xp 77 XSDecode(src1, src2, SrcType.X, FuType.alu, fuOp, selImm, 78 xWen = T, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = flushPipe).generate() 79 } 80} 81 82case class VLD(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, ff: Boolean = false, 83 mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 84 def generate() : List[BitPat] = { 85 val fu = FuType.vldu 86 val src1 = SrcType.xp 87 val src3 = SrcType.X 88 XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 89 xWen = F, fWen = F, vWen = T, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 90 } 91} 92 93case class VST(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, 94 mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 95 def generate() : List[BitPat] = { 96 val fu = FuType.vstu 97 val src1 = SrcType.xp 98 val src3 = SrcType.vp 99 XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 100 xWen = F, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 101 } 102} 103 104object VecDecoder extends DecodeConstants { 105 val opivv: Array[(BitPat, XSDecodeBase)] = Array( 106 VADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 107 VSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 108 109 VMINU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 110 VMIN_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 111 VMAXU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 112 VMAX_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 113 114 VAND_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 115 VOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 116 VXOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 117 118 VRGATHER_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 119 VRGATHEREI16_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 120 121 VADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 122 VMADC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 123 VMADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 124 125 VSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 126 VMSBC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 127 VMSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 128 129 VMERGE_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 130 131 VMSEQ_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 132 VMSNE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 133 VMSLTU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 134 VMSLT_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 135 VMSLEU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 136 VMSLE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 137 138 VSLL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 139 VSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 140 VSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 141 VNSRL_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 142 VNSRA_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 143 144 VSADDU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 145 VSADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 146 VSSUBU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 147 VSSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 148 149 VSMUL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 150 151 VSSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 152 VSSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 153 154 VNCLIPU_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 155 VNCLIP_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 156 157 VWREDSUMU_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 158 VWREDSUM_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 159 ) 160 161 val opivx: Array[(BitPat, XSDecodeBase)] = Array( 162 VADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 163 VSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 164 VRSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 165 166 VMINU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 167 VMIN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 168 VMAXU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 169 VMAX_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 170 171 VAND_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 172 VOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 173 VXOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 174 175 VRGATHER_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 176 177 VSLIDEUP_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 178 VSLIDEDOWN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 179 180 VADC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 181 VMADC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 182 VSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 183 VMSBC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 184 VMSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 185 186 VMERGE_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 187 188 VMSEQ_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 189 VMSNE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 190 VMSLTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 191 VMSLT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 192 VMSLEU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 193 VMSLE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 194 VMSGTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 195 VMSGT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 196 197 VSLL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 198 VSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 199 VSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 200 VNSRL_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 201 VNSRA_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 202 203 VSADDU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 204 VSADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 205 VSSUBU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 206 VSSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 207 208 209 VSMUL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 210 211 VSSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 212 VSSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 213 214 VNCLIPU_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 215 VNCLIP_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 216 ) 217 218 val opivi: Array[(BitPat, XSDecodeBase)] = Array( 219 VADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 220 VRSUB_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 221 222 VAND_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 223 VOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 224 VXOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 225 226 VRGATHER_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 227 228 VSLIDEUP_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 229 VSLIDEDOWN_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 230 231 VADC_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 232 VMADC_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 233 234 VMERGE_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 235 236 VMSEQ_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 237 VMSNE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 238 VMSLEU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 239 VMSLE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 240 VMSGTU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 241 VMSGT_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 242 243 VSLL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 244 VSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 245 VSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 246 VNSRL_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 247 VNSRA_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 248 249 VSADDU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 250 VSADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 251 252 VSSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 253 VSSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 254 255 VNCLIPU_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 256 VNCLIP_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 257 258 VMV1R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 259 VMV2R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 260 VMV4R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 261 VMV8R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 262 ) 263 264 val opmvv: Array[(BitPat, XSDecodeBase)] = Array( 265 VAADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 266 VAADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 267 VASUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 268 VASUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 269 VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 270 VCPOP_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 271 VDIV_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 272 VDIVU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 273 VFIRST_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 274 VID_V -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 275 VIOTA_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 276 277 // VMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 278 279 VMADD_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 280 VMAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 281 VMANDN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 282 VMNAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 283 VMNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 284 VMOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 285 VMORN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 286 VMXNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 287 VMXOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 288 VMSBF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 289 VMSIF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 290 VMSOF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 291 VMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 292 VMULH_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 293 VMULHSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 294 VMULHU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 295 296 VMV_X_S -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 297 VNMSAC_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 298 VNMSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 299 VREDAND_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 300 VREDMAX_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 301 VREDMAXU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 302 VREDMIN_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 303 VREDMINU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 304 VREDOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 305 VREDSUM_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 306 VREDXOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 307 VREM_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 308 VREMU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 309 VSEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 310 VSEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 311 VSEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 312 VZEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 313 VZEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 314 VZEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 315 VWADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 316 VWADD_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 317 VWADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 318 VWADDU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 319 VWMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 320 VWMACCSU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 321 VWMACCU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 322 VWMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 323 VWMULSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 324 VWMULU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 325 VWSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 326 VWSUB_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 327 VWSUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 328 VWSUBU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 329 ) 330 331 val opmvx: Array[(BitPat, XSDecodeBase)] = Array( 332 VAADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 333 VAADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 334 VASUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 335 VASUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 336 VDIV_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 337 VDIVU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 338 VMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 339 VMADD_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 340 VMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 341 VMULH_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 342 VMULHSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 343 VMULHU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 344 VMV_S_X -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 345 346 VNMSAC_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 347 VNMSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 348 VREM_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 349 VREMU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 350 351 VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 352 VSLIDE1UP_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 353 VWADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 354 VWADD_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 355 VWADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 356 VWADDU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 357 358 // OutOfMemoryError 359 VWMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 360 VWMACCSU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 361 VWMACCU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 362 363 VWMACCUS_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 364 VWMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 365 VWMULSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 366 // Ok 367 VWMULU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 368 VWSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 369 VWSUB_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 370 VWSUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 371 VWSUBU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 372 ) 373 374 val opfvv: Array[(BitPat, XSDecodeBase)] = Array( 375 // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 376 VFADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 377 VFSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 378 379 // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 380 VFWADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 381 VFWSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 382 VFWADD_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 383 VFWSUB_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 384 385 // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 386 VFMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 387 VFDIV_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 388 389 // 13.5. Vector Widening Floating-Point Multiply 390 VFWMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 391 392 // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 393 VFMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 394 VFNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 395 VFMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 396 VFNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 397 VFMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 398 VFNMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 399 VFMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 400 VFNMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 401 402 // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 403 VFWMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 404 VFWNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 405 VFWMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 406 VFWNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 407 408 // 13.8. Vector Floating-Point Square-Root Instruction 409 VFSQRT_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 410 411 // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction 412 VFRSQRT7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 413 414 // 13.10. Vector Floating-Point Reciprocal Estimate Instruction 415 VFREC7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 416 417 // 13.11. Vector Floating-Point MIN/MAX Instructions 418 VFMIN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 419 VFMAX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 420 421 // 13.12. Vector Floating-Point Sign-Injection Instructions 422 VFSGNJ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 423 VFSGNJN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 424 VFSGNJX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 425 426 // 13.13. Vector Floating-Point Compare Instructions 427 VMFEQ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 428 VMFNE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 429 VMFLT_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 430 VMFLE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 431 432 // 13.14. Vector Floating-Point Classify Instruction 433 VFCLASS_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 434 435 // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions 436 VFCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 437 VFCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 438 VFCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 439 VFCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 440 VFCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 441 VFCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 442 443 // 13.18. Widening Floating-Point/Integer Type-Convert Instructions 444 VFWCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 445 VFWCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 446 VFWCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 447 VFWCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 448 VFWCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 449 VFWCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 450 VFWCVT_F_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 451 452 // ! 453 // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions 454 VFNCVT_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 455 VFNCVT_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 456 VFNCVT_RTZ_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 457 VFNCVT_RTZ_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 458 VFNCVT_F_XU_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 459 VFNCVT_F_X_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 460 VFNCVT_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 461 VFNCVT_ROD_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 462 463 // 14.3. Vector Single-Width Floating-Point Reduction Instructions 464 VFREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 465 VFREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 466 VFREDMAX_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 467 VFREDMIN_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 468 469 // 14.4. Vector Widening Floating-Point Reduction Instructions 470 VFWREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 471 VFWREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 472 473 // 16.2. Floating-Point Scalar Move Instructions 474 VFMV_F_S -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// f[rd] = vs2[0] (rs1=0) 475 ) 476 477 val opfvf: Array[(BitPat, XSDecodeBase)] = Array( 478 // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 479 VFADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 480 VFSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 481 VFRSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 482 483 // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 484 VFWADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 485 VFWSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 486 VFWADD_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 487 VFWSUB_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 488 489 // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 490 VFMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 491 VFDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 492 VFRDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 493 494 // 13.5. Vector Widening Floating-Point Multiply 495 VFWMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 496 497 // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 498 VFMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 499 VFNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 500 VFMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 501 VFNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 502 VFMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 503 VFNMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 504 VFMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 505 VFNMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 506 507 // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 508 VFWMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 509 VFWNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 510 VFWMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 511 VFWNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 512 513 // 13.11. Vector Floating-Point MIN/MAX Instructions 514 VFMIN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 515 VFMAX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 516 517 // 13.12. Vector Floating-Point Sign-Injection Instructions 518 VFSGNJ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 519 VFSGNJN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 520 VFSGNJX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 521 522 // 13.13. Vector Floating-Point Compare Instructions 523 VMFEQ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 524 VMFNE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 525 VMFLT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 526 VMFLE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 527 VMFGT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 528 VMFGE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 529 530 // 13.15. Vector Floating-Point Merge Instruction 531 VFMERGE_VFM -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 532 533 // 13.16. Vector Floating-Point Move Instruction 534 VFMV_V_F -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// src2=SrcType.X 535 536 // 16.2. Floating-Point Scalar Move Instructions 537 VFMV_S_F -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vs2=0 538 539 // 16.3.3. Vector Slide1up 540 // vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i] 541 VFSLIDE1UP_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[0]=f[rs1], vd[i+1] = vs2[i] 542 543 // 16.3.4. Vector Slide1down Instruction 544 // vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1] 545 VFSLIDE1DOWN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1] 546 ) 547 548 val vset: Array[(BitPat, XSDecodeBase)] = Array( 549 VSETVLI -> VSET(F, T, ALUOpType.vsetvli1, F, SelImm.IMM_VSETVLI), 550 VSETIVLI -> VSET(T, T, ALUOpType.vsetivli1, F, SelImm.IMM_VSETIVLI), 551 VSETVL -> VSET(F, F, ALUOpType.vsetvl1, T, SelImm.X), // flush pipe 552 ) 553 554 val vls: Array[(BitPat, XSDecodeBase)] = Array( 555 // 7.4. Vector Unit-Stride Instructions 556 VLE8_V -> VLD(SrcType.X, VlduType.dummy), 557 VLE16_V -> VLD(SrcType.X, VlduType.dummy), 558 VLE32_V -> VLD(SrcType.X, VlduType.dummy), 559 VLE64_V -> VLD(SrcType.X, VlduType.dummy), 560 VSE8_V -> VST(SrcType.X, VstuType.dummy), 561 VSE16_V -> VST(SrcType.X, VstuType.dummy), 562 VSE32_V -> VST(SrcType.X, VstuType.dummy), 563 VSE64_V -> VST(SrcType.X, VstuType.dummy), 564 VLM_V -> VLD(SrcType.X, VlduType.dummy, mask = T), 565 VSM_V -> VST(SrcType.X, VstuType.dummy, mask = T), 566 // 7.5. Vector Strided Instructions 567 VLSE8_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 568 VLSE16_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 569 VLSE32_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 570 VLSE64_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 571 VSSE8_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 572 VSSE16_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 573 VSSE32_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 574 VSSE64_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 575 // 7.6. Vector Indexed Instructions 576 VLUXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 577 VLUXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 578 VLUXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 579 VLUXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 580 VLOXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 581 VLOXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 582 VLOXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 583 VLOXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 584 VSUXEI8_V -> VLD(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 585 VSUXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 586 VSUXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 587 VSUXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 588 VSOXEI8_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 589 VSOXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 590 VSOXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 591 VSOXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 592 // 7.7. Unit-stride Fault-Only-First Loads 593 VLE8FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 594 VLE16FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 595 VLE32FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 596 VLE64FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 597 // 7.8. Vector Load/Store Segment Instructions 598 // 7.8.1. Vector Unit-Stride Segment Loads and Stores 599 // TODO 600 // 7.8.2. Vector Strided Segment Loads and Stores 601 // TODO 602 // 7.8.3. Vector Indexed Segment Loads and Stores 603 // TODO 604 // 7.9. Vector Load/Store Whole Register Instructions 605 VL1RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 606 VL1RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 607 VL1RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 608 VL1RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 609 VL2RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 610 VL2RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 611 VL2RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 612 VL2RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 613 VL4RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 614 VL4RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 615 VL4RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 616 VL4RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 617 VL8RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 618 VL8RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 619 VL8RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 620 VL8RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 621 VS1R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 622 VS2R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 623 VS4R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 624 VS8R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 625 ) 626 627 override val decodeArray: Array[(BitPat, XSDecodeBase)] = vset ++ vls ++ 628 opivv ++ opivx ++ opivi ++ opmvv ++ opmvx ++ opfvv ++ opfvf 629} 630