xref: /XiangShan/src/main/scala/xiangshan/backend/decode/VecDecoder.scala (revision 7194f5fac1b6886d350888134bb89b08dd16f734) 
1package xiangshan.backend.decode
2
3import chipsalliance.rocketchip.config.Parameters
4import chisel3._
5import chisel3.util._
6import freechips.rocketchip.util.uintToBitPat
7import utils._
8import xiangshan.ExceptionNO.illegalInstr
9import xiangshan._
10import freechips.rocketchip.rocket.Instructions._
11
12abstract class VecType {
13  def X = BitPat("b?")
14  def N = BitPat("b0")
15  def Y = BitPat("b1")
16  def generate() : List[BitPat]
17  def asOldDecodeOutput(): List[BitPat] = {
18    val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate()
19    List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm)
20  }
21}
22
23case class OPIVV(fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean) extends VecType {
24  def generate() : List[BitPat] = {
25    List (SrcType.vp, SrcType.vp, SrcType.X, fu, fuOp, N, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
26  }
27}
28
29case class OPIVX() extends VecType {
30  def generate() : List[BitPat] = { null }
31}
32
33case class OPIVI() extends VecType {
34  def generate() : List[BitPat] = { null }
35}
36
37case class OPMVV(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any) extends VecType {
38  private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X
39  def generate() : List[BitPat] = {
40    List (SrcType.vp, SrcType.vp, src3, fu, fuOp, xWen.B, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
41  }
42}
43
44case class OPMVX(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any) extends VecType {
45  private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X
46  def generate() : List[BitPat] = {
47    List (SrcType.xp, SrcType.vp, src3, fu, fuOp, xWen.B, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
48  }
49}
50
51case class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat,  fWen: Boolean, vWen: Boolean, mWen: Boolean) extends VecType {
52  def generate() : List[BitPat] = {
53    List (src1, SrcType.vp, src3, fu, fuOp, N, fWen.B, vWen.B, mWen.B, N, N, N, N, SelImm.X)
54  }
55}
56
57case class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends VecType {
58  def generate() : List[BitPat] = {
59    List (src1, SrcType.vp, src3, fu, fuOp, N, fWen.B, vWen.B, mWen.B, N, N, N, N, SelImm.X)
60  }
61}
62
63case class VSET() extends VecType {
64  def generate() : List[BitPat] = { null }
65}
66
67case class VLS() extends VecType {
68  def generate() : List[BitPat] = { null }
69}
70
71object VecDecoder extends DecodeConstants {
72  private def F = false
73  private def T = true
74
75  val opivvTable: Array[(BitPat, List[BitPat])] = Array(
76    VADD_VV   -> OPIVV(FuType.vipu, VipuType.dummy, T, F).generate(),
77
78    VMSEQ_VV  -> OPIVV(FuType.vipu, VipuType.dummy, F, T).generate(),
79  )
80
81  val opivxTable: Array[(BitPat, List[BitPat])] = Array()
82  val opiviTable: Array[(BitPat, List[BitPat])] = Array()
83
84  val opmvv: Array[(BitPat, OPMVV)] = Array(
85    VAADD_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
86    VAADDU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
87    VASUB_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
88    VASUBU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
89    VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
90    VCPOP_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F, T),
91    VDIV_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
92    VDIVU_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
93    VFIRST_M     -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F, T),
94    VID_V        -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
95    VIOTA_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
96    VMACC_VV     -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
97    VMADD_VV     -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
98    VMAND_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
99    VMANDN_MM    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
100    VMNAND_MM    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
101    VMNOR_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
102    VMOR_MM      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
103    VMORN_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
104    VMXNOR_MM    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
105    VMXOR_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
106    VMSBF_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
107    VMSIF_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
108    VMSOF_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
109    VMUL_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
110    VMULH_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
111    VMULHSU_VV   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
112    VMULHU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
113    VMV_X_S      -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F, T),
114    VNMSAC_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
115    VNMSUB_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
116    VREDAND_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
117    VREDMAX_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
118    VREDMAXU_VS  -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
119    VREDMIN_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
120    VREDMINU_VS  -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
121    VREDOR_VS    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
122    VREDSUM_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
123    VREDXOR_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
124    VREM_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
125    VREMU_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
126    VSEXT_VF2    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
127    VSEXT_VF4    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
128    VSEXT_VF8    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
129    VZEXT_VF2    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
130    VZEXT_VF4    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
131    VZEXT_VF8    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
132    VWADD_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
133    VWADD_WV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
134    VWADDU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
135    VWADDU_WV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
136    VWMACC_VV    -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
137    VWMACCSU_VV  -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
138    VWMACCU_VV   -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
139    VWMUL_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
140    VWMULSU_VV   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
141    VWMULU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
142    VWSUB_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
143    VWSUB_WV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
144    VWSUBU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
145    VWSUBU_WV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T)
146  )
147  val opmvx: Array[(BitPat, OPMVX)] = Array(
148    VAADD_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
149    VAADDU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
150    VASUB_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
151    VASUBU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
152    VDIV_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
153    VDIVU_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
154    VMACC_VX       -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
155    VMADD_VX       -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
156    VMUL_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
157    VMULH_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
158    VMULHSU_VX     -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
159    VMULHU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
160    VMV_S_X        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
161    VNMSAC_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
162    VNMSUB_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
163    VREM_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
164    VREMU_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
165    VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
166    VSLIDE1UP_VX   -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
167    VWADD_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
168    VWADD_WX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
169    VWADDU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
170    VWADDU_WX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
171    VWMACC_VX      -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
172    VWMACCSU_VX    -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
173    VWMACCU_VX     -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
174    VWMACCUS_VX    -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
175    VWMUL_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
176    VWMULSU_VX     -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
177    VWMULU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
178    VWSUB_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
179    VWSUB_WX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
180    VWSUBU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
181    VWSUBU_WX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T)
182  )
183  val opmvvTable: Array[(BitPat, List[BitPat])] = opmvv.map(x => (x._1, x._2.generate()))
184  val opmvxTable: Array[(BitPat, List[BitPat])] = opmvx.map(x => (x._1, x._2.generate()))
185
186
187  val opfvvTable: Array[(BitPat, List[BitPat])] = Array(
188                       // OPFVV(fu: BitPat, fuOp: BitPat,  fWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any)
189// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
190VFADD_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
191VFSUB_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
192
193// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
194VFWADD_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
195VFWSUB_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
196VFWADD_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
197VFWSUB_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
198
199// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
200VFMUL_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
201VFDIV_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
202
203// 13.5. Vector Widening Floating-Point Multiply
204VFWMUL_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
205
206// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
207VFMACC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
208VFNMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
209VFMSAC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
210VFNMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
211VFMADD_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
212VFNMADD_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
213VFMSUB_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
214VFNMSUB_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
215
216// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
217VFWMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
218VFWNMACC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
219VFWMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
220VFWNMSAC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
221
222// 13.8. Vector Floating-Point Square-Root Instruction
223VFSQRT_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
224
225// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
226VFRSQRT7_V         -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
227
228// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
229VFREC7_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
230
231// 13.11. Vector Floating-Point MIN/MAX Instructions
232VFMIN_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
233VFMAX_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
234
235// 13.12. Vector Floating-Point Sign-Injection Instructions
236VFSGNJ_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
237VFSGNJN_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
238VFSGNJX_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
239
240// 13.13. Vector Floating-Point Compare Instructions
241VMFEQ_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
242VMFNE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
243VMFLT_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
244VMFLE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
245
246// 13.14. Vector Floating-Point Classify Instruction
247VFCLASS_V          -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
248
249// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
250VFCVT_XU_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
251VFCVT_X_F_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
252VFCVT_RTZ_XU_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
253VFCVT_RTZ_X_F_V    -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
254VFCVT_F_XU_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
255VFCVT_F_X_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
256
257// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
258VFWCVT_XU_F_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
259VFWCVT_X_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
260VFWCVT_RTZ_XU_F_V  -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
261VFWCVT_RTZ_X_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
262VFWCVT_F_XU_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
263VFWCVT_F_X_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
264VFWCVT_F_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
265
266// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
267VFNCVT_XU_F_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
268VFNCVT_X_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
269VFNCVT_RTZ_XU_F_W  -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
270VFNCVT_RTZ_X_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
271VFNCVT_F_XU_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
272VFNCVT_F_X_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
273VFNCVT_F_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
274VFNCVT_ROD_F_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
275
276// 14.3. Vector Single-Width Floating-Point Reduction Instructions
277VFREDOSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
278VFREDUSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
279VFREDMAX_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
280VFREDMIN_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
281
282// 14.4. Vector Widening Floating-Point Reduction Instructions
283VFWREDOSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
284VFWREDUSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
285
286// 16.2. Floating-Point Scalar Move Instructions
287VFMV_F_S           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),// f[rd] = vs2[0] (rs1=0)
288
289
290
291  )
292
293  val opfvfTable: Array[(BitPat, List[BitPat])] = Array(
294// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
295VFADD_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
296VFSUB_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
297VFRSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
298
299// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
300VFWADD_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
301VFWSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
302VFWADD_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
303VFWSUB_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
304
305// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
306VFMUL_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
307VFDIV_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
308VFRDIV_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
309
310// 13.5. Vector Widening Floating-Point Multiply
311VFWMUL_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
312
313// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
314VFMACC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
315VFNMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
316VFMSAC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
317VFNMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
318VFMADD_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
319VFNMADD_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
320VFMSUB_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
321VFNMSUB_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
322
323// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
324VFWMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
325VFWNMACC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
326VFWMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
327VFWNMSAC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
328
329// 13.11. Vector Floating-Point MIN/MAX Instructions
330VFMIN_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
331VFMAX_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
332
333// 13.12. Vector Floating-Point Sign-Injection Instructions
334VFSGNJ_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
335VFSGNJN_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
336VFSGNJX_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
337
338// 13.13. Vector Floating-Point Compare Instructions
339VMFEQ_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
340VMFNE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
341VMFLT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
342VMFLE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
343VMFGT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
344VMFGE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
345
346// 13.15. Vector Floating-Point Merge Instruction
347VFMERGE_VFM        -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
348
349// 13.16. Vector Floating-Point Move Instruction
350VFMV_V_F           -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// src2=SrcType.X
351
352// 16.2. Floating-Point Scalar Move Instructions
353VFMV_S_F           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vs2=0
354
355// 16.3.3. Vector Slide1up
356// vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i]
357VFSLIDE1UP_VF      -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vd[0]=f[rs1], vd[i+1] = vs2[i]
358
359// 16.3.4. Vector Slide1down Instruction
360// vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1]
361VFSLIDE1DOWN_VF    -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1]
362
363  )
364
365  val vsetTable: Array[(BitPat, List[BitPat])] = Array()
366  val vlsTable: Array[(BitPat, List[BitPat])] = Array()
367
368  val table = opivvTable ++ opivxTable ++ opiviTable ++
369              opmvvTable ++ opmvxTable ++
370              opfvvTable ++ opfvfTable ++
371              vsetTable ++ vlsTable
372}
373