xref: /XiangShan/src/main/scala/xiangshan/backend/decode/VecDecoder.scala (revision 4471ec0adae1d92763d0758567316353b588f397) 
1package xiangshan.backend.decode
2
3import chipsalliance.rocketchip.config.Parameters
4import chisel3._
5import chisel3.util._
6import freechips.rocketchip.util.uintToBitPat
7import freechips.rocketchip.rocket.Instructions._
8import utils._
9import xiangshan.ExceptionNO.illegalInstr
10import xiangshan._
11import yunsuan.{VipuType, VfpuType}
12
13abstract class VecType {
14  def X = BitPat("b?")
15  def N = BitPat("b0")
16  def Y = BitPat("b1")
17  def generate() : List[BitPat]
18  def asOldDecodeOutput(): List[BitPat] = {
19    val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate()
20    List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm)
21  }
22}
23
24case class OPIVV(fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean) extends VecType {
25  def generate() : List[BitPat] = {
26    List (SrcType.vp, SrcType.vp, SrcType.X, fu, fuOp, N, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
27  }
28}
29
30case class OPIVX() extends VecType {
31  def generate() : List[BitPat] = { null }
32}
33
34case class OPIVI() extends VecType {
35  def generate() : List[BitPat] = { null }
36}
37
38case class OPMVV(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any) extends VecType {
39  private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X
40  def generate() : List[BitPat] = {
41    List (SrcType.vp, SrcType.vp, src3, fu, fuOp, xWen.B, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
42  }
43}
44
45case class OPMVX(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any) extends VecType {
46  private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X
47  def generate() : List[BitPat] = {
48    List (SrcType.xp, SrcType.vp, src3, fu, fuOp, xWen.B, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
49  }
50}
51
52case class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat,  fWen: Boolean, vWen: Boolean, mWen: Boolean) extends VecType {
53  def generate() : List[BitPat] = {
54    List (src1, SrcType.vp, src3, fu, fuOp, N, fWen.B, vWen.B, mWen.B, N, N, N, N, SelImm.X)
55  }
56}
57
58case class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends VecType {
59  def generate() : List[BitPat] = {
60    List (src1, SrcType.vp, src3, fu, fuOp, N, fWen.B, vWen.B, mWen.B, N, N, N, N, SelImm.X)
61  }
62}
63
64case class VSET() extends VecType {
65  def generate() : List[BitPat] = { null }
66}
67
68case class VLS() extends VecType {
69  def generate() : List[BitPat] = { null }
70}
71
72object VecDecoder extends DecodeConstants {
73  private def F = false
74  private def T = true
75
76  val opivvTable: Array[(BitPat, List[BitPat])] = Array(
77    VADD_VV   -> OPIVV(FuType.vipu, VipuType.dummy, T, F).generate(),
78
79    VMSEQ_VV  -> OPIVV(FuType.vipu, VipuType.dummy, F, T).generate(),
80  )
81
82  val opivxTable: Array[(BitPat, List[BitPat])] = Array()
83  val opiviTable: Array[(BitPat, List[BitPat])] = Array()
84
85  val opmvv: Array[(BitPat, OPMVV)] = Array(
86    VAADD_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
87    VAADDU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
88    VASUB_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
89    VASUBU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
90    VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
91    VCPOP_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F, T),
92    VDIV_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
93    VDIVU_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
94    VFIRST_M     -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F, T),
95    VID_V        -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
96    VIOTA_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
97    VMACC_VV     -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
98    VMADD_VV     -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
99    VMAND_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
100    VMANDN_MM    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
101    VMNAND_MM    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
102    VMNOR_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
103    VMOR_MM      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
104    VMORN_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
105    VMXNOR_MM    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
106    VMXOR_MM     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
107    VMSBF_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
108    VMSIF_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
109    VMSOF_M      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
110    VMUL_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
111    VMULH_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
112    VMULHSU_VV   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
113    VMULHU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
114    VMV_X_S      -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F, T),
115    VNMSAC_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
116    VNMSUB_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
117    VREDAND_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
118    VREDMAX_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
119    VREDMAXU_VS  -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
120    VREDMIN_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
121    VREDMINU_VS  -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
122    VREDOR_VS    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
123    VREDSUM_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
124    VREDXOR_VS   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
125    VREM_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
126    VREMU_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
127    VSEXT_VF2    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
128    VSEXT_VF4    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
129    VSEXT_VF8    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
130    VZEXT_VF2    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
131    VZEXT_VF4    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
132    VZEXT_VF8    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
133    VWADD_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
134    VWADD_WV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
135    VWADDU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
136    VWADDU_WV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
137    VWMACC_VV    -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
138    VWMACCSU_VV  -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
139    VWMACCU_VV   -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F, T),
140    VWMUL_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
141    VWMULSU_VV   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
142    VWMULU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
143    VWSUB_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
144    VWSUB_WV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
145    VWSUBU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T),
146    VWSUBU_WV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F, T)
147  )
148  val opmvx: Array[(BitPat, OPMVX)] = Array(
149    VAADD_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
150    VAADDU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
151    VASUB_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
152    VASUBU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
153    VDIV_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
154    VDIVU_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
155    VMACC_VX       -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
156    VMADD_VX       -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
157    VMUL_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
158    VMULH_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
159    VMULHSU_VX     -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
160    VMULHU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
161    VMV_S_X        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
162    VNMSAC_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
163    VNMSUB_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
164    VREM_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
165    VREMU_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
166    VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
167    VSLIDE1UP_VX   -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
168    VWADD_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
169    VWADD_WX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
170    VWADDU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
171    VWADDU_WX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
172    VWMACC_VX      -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
173    VWMACCSU_VX    -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
174    VWMACCU_VX     -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
175    VWMACCUS_VX    -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F, T),
176    VWMUL_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
177    VWMULSU_VX     -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
178    VWMULU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
179    VWSUB_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
180    VWSUB_WX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
181    VWSUBU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T),
182    VWSUBU_WX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F, T)
183  )
184  val opmvvTable: Array[(BitPat, List[BitPat])] = opmvv.map(x => (x._1, x._2.generate()))
185  val opmvxTable: Array[(BitPat, List[BitPat])] = opmvx.map(x => (x._1, x._2.generate()))
186
187
188  val opfvvTable: Array[(BitPat, List[BitPat])] = Array(
189                       // OPFVV(fu: BitPat, fuOp: BitPat,  fWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any)
190// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
191VFADD_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
192VFSUB_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
193
194// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
195VFWADD_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
196VFWSUB_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
197VFWADD_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
198VFWSUB_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
199
200// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
201VFMUL_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
202VFDIV_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
203
204// 13.5. Vector Widening Floating-Point Multiply
205VFWMUL_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
206
207// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
208VFMACC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
209VFNMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
210VFMSAC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
211VFNMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
212VFMADD_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
213VFNMADD_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
214VFMSUB_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
215VFNMSUB_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
216
217// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
218VFWMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
219VFWNMACC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
220VFWMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
221VFWNMSAC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
222
223// 13.8. Vector Floating-Point Square-Root Instruction
224VFSQRT_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
225
226// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
227VFRSQRT7_V         -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
228
229// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
230VFREC7_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
231
232// 13.11. Vector Floating-Point MIN/MAX Instructions
233VFMIN_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
234VFMAX_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
235
236// 13.12. Vector Floating-Point Sign-Injection Instructions
237VFSGNJ_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
238VFSGNJN_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
239VFSGNJX_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
240
241// 13.13. Vector Floating-Point Compare Instructions
242VMFEQ_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
243VMFNE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
244VMFLT_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
245VMFLE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
246
247// 13.14. Vector Floating-Point Classify Instruction
248VFCLASS_V          -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
249
250// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
251VFCVT_XU_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
252VFCVT_X_F_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
253VFCVT_RTZ_XU_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
254VFCVT_RTZ_X_F_V    -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
255VFCVT_F_XU_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
256VFCVT_F_X_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
257
258// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
259VFWCVT_XU_F_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
260VFWCVT_X_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
261VFWCVT_RTZ_XU_F_V  -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
262VFWCVT_RTZ_X_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
263VFWCVT_F_XU_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
264VFWCVT_F_X_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
265VFWCVT_F_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
266
267// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
268VFNCVT_XU_F_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
269VFNCVT_X_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
270VFNCVT_RTZ_XU_F_W  -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
271VFNCVT_RTZ_X_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
272VFNCVT_F_XU_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
273VFNCVT_F_X_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
274VFNCVT_F_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
275VFNCVT_ROD_F_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
276
277// 14.3. Vector Single-Width Floating-Point Reduction Instructions
278VFREDOSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
279VFREDUSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
280VFREDMAX_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
281VFREDMIN_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
282
283// 14.4. Vector Widening Floating-Point Reduction Instructions
284VFWREDOSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
285VFWREDUSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
286
287// 16.2. Floating-Point Scalar Move Instructions
288VFMV_F_S           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// f[rd] = vs2[0] (rs1=0)
289
290
291
292  )
293
294  val opfvfTable: Array[(BitPat, List[BitPat])] = Array(
295// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
296VFADD_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
297VFSUB_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
298VFRSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
299
300// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
301VFWADD_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
302VFWSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
303VFWADD_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
304VFWSUB_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
305
306// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
307VFMUL_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
308VFDIV_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
309VFRDIV_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
310
311// 13.5. Vector Widening Floating-Point Multiply
312VFWMUL_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
313
314// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
315VFMACC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
316VFNMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
317VFMSAC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
318VFNMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
319VFMADD_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
320VFNMADD_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
321VFMSUB_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
322VFNMSUB_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
323
324// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
325VFWMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
326VFWNMACC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
327VFWMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
328VFWNMSAC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
329
330// 13.11. Vector Floating-Point MIN/MAX Instructions
331VFMIN_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
332VFMAX_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
333
334// 13.12. Vector Floating-Point Sign-Injection Instructions
335VFSGNJ_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
336VFSGNJN_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
337VFSGNJX_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
338
339// 13.13. Vector Floating-Point Compare Instructions
340VMFEQ_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
341VMFNE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
342VMFLT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
343VMFLE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
344VMFGT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
345VMFGE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
346
347// 13.15. Vector Floating-Point Merge Instruction
348VFMERGE_VFM        -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
349
350// 13.16. Vector Floating-Point Move Instruction
351VFMV_V_F           -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// src2=SrcType.X
352
353// 16.2. Floating-Point Scalar Move Instructions
354VFMV_S_F           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vs2=0
355
356// 16.3.3. Vector Slide1up
357// vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i]
358VFSLIDE1UP_VF      -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vd[0]=f[rs1], vd[i+1] = vs2[i]
359
360// 16.3.4. Vector Slide1down Instruction
361// vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1]
362VFSLIDE1DOWN_VF    -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1]
363
364  )
365
366  val vsetTable: Array[(BitPat, List[BitPat])] = Array()
367  val vlsTable: Array[(BitPat, List[BitPat])] = Array()
368
369  val table = opivvTable ++ opivxTable ++ opiviTable ++
370              opmvvTable ++ opmvxTable ++
371              opfvvTable ++ opfvfTable ++
372              vsetTable ++ vlsTable
373}
374