xref: /XiangShan/src/main/scala/xiangshan/backend/decode/VecDecoder.scala (revision 1e160ed8f7c18a21fbe4b2b074150af3df0aeb09) 
1package xiangshan.backend.decode
2
3import chipsalliance.rocketchip.config.Parameters
4import chisel3._
5import chisel3.util.BitPat.bitPatToUInt
6import chisel3.util._
7import freechips.rocketchip.util.uintToBitPat
8import freechips.rocketchip.rocket.Instructions._
9import utils._
10import xiangshan.ExceptionNO.illegalInstr
11import xiangshan._
12import yunsuan.{VfpuType, VipuType, VppuType}
13
14abstract class VecDecode extends XSDecodeBase {
15  def generate() : List[BitPat]
16  def asOldDecodeOutput(): List[BitPat] = {
17    val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate()
18    List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm)
19  }
20  def asFirstStageDecodeOutput(): List[BitPat] = {
21    val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate()
22    List (src1, src2, src3, fu, fuOp, xWen, fWen, bitPatToUInt(vWen) | bitPatToUInt(mWen), xsTrap, noSpec, blockBack, flushPipe, selImm)
23  }
24}
25
26case class OPIVV(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, uopDivType: BitPat = UopDivType.VEC_LMUL) extends XSDecodeBase {
27  def generate() : List[BitPat] = {
28    XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType,
29      xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
30  }
31}
32
33case class OPIVX(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, uopDivType: BitPat = UopDivType.VEC_MV_LMUL) extends XSDecodeBase {
34  def generate() : List[BitPat] = {
35    XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType,
36      xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
37  }
38}
39
40case class OPIVI(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, selImm: BitPat, uopDivType: BitPat = UopDivType.VEC_LMUL) extends XSDecodeBase {
41  def generate() : List[BitPat] = {
42    XSDecode(SrcType.imm, SrcType.vp, src3, fu, fuOp, selImm, uopDivType,
43      xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
44  }
45}
46
47case class OPMVV(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase {
48  private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X
49  def generate() : List[BitPat] = {
50    XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType, xWen, F, vWen, mWen, F, F, F, F).generate()
51  }
52}
53
54case class OPMVX(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase {
55  private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X
56  def generate() : List[BitPat] = {
57    XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType,
58      xWen = xWen, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
59  }
60}
61
62case class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase {
63  def generate() : List[BitPat] = {
64    XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType,
65      xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
66  }
67}
68
69case class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase {
70  def generate() : List[BitPat] = {
71    XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, uopDivType,
72      xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
73  }
74}
75
76case class VSET(vli: Boolean, vtypei: Boolean, fuOp: BitPat, flushPipe: Boolean, selImm: BitPat, uopDivType: BitPat = UopDivType.DIR) extends XSDecodeBase {
77  def generate() : List[BitPat] = {
78    val src1 = if (vli) SrcType.imm else SrcType.xp
79    val src2 = if (vtypei) SrcType.imm else SrcType.xp
80    XSDecode(src1, src2, SrcType.X, FuType.alu, fuOp, selImm, uopDivType,
81      xWen = T, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = flushPipe).generate()
82  }
83}
84
85case class VLD(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, ff: Boolean = false,
86  mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase {
87  def generate() : List[BitPat] = {
88    val fu = FuType.vldu
89    val src1 = SrcType.xp
90    val src3 = SrcType.X
91    XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, uopDivType,
92      xWen = F, fWen = F, vWen = T, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
93  }
94}
95
96case class VST(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false,
97  mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false, uopDivType: BitPat = UopDivType.dummy) extends XSDecodeBase {
98  def generate() : List[BitPat] = {
99    val fu = FuType.vstu
100    val src1 = SrcType.xp
101    val src3 = SrcType.vp
102    XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, uopDivType,
103      xWen = F, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate()
104  }
105}
106
107object VecDecoder extends DecodeConstants {
108  val opivv: Array[(BitPat, XSDecodeBase)] = Array(
109    VADD_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vadd_vv, T, F, F),
110    VSUB_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vsub_vv, T, F, F),
111
112    VMINU_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vminu_vv, T, F, F),
113    VMIN_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmin_vv, T, F, F),
114    VMAXU_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmaxu_vv, T, F, F),
115    VMAX_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmax_vv, T, F, F),
116
117    VAND_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vand_vv, T, F, F),
118    VOR_VV          -> OPIVV(SrcType.X, FuType.vipu, VipuType.vor_vv, T, F, F),
119    VXOR_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vxor_vv, T, F, F),
120
121    VRGATHER_VV     -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F),
122    VRGATHEREI16_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F),
123
124    VADC_VVM        -> OPIVV(SrcType.vp, FuType.vipu, VipuType.vadc_vvm, T, F, F),
125    VMADC_VVM       -> OPIVV(SrcType.vp, FuType.vipu, VipuType.vmadc_vvm, F, T, F, UopDivType.VEC_MASK),
126    VMADC_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmadc_vv, F, T, F, UopDivType.VEC_MASK),
127
128    VSBC_VVM        -> OPIVV(SrcType.vp, FuType.vipu, VipuType.vsbc_vvm, T, F, F),
129    VMSBC_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmsbc_vv, F, T, F, UopDivType.VEC_MASK),
130    VMSBC_VVM       -> OPIVV(SrcType.vp, FuType.vipu, VipuType.vmsbc_vvm, F, T, F, UopDivType.VEC_MASK),
131
132    VMERGE_VVM      -> OPIVV(SrcType.vp, FuType.vipu, VipuType.vmerge_vvm, T, F, F),
133
134    VMV_V_V      -> OPIVV(SrcType.vp, FuType.vipu, VipuType.vmv_v_v, T, F, F),
135
136    VMSEQ_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmseq_vv, F, T, F, UopDivType.VEC_MASK),
137    VMSNE_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmsne_vv, F, T, F, UopDivType.VEC_MASK),
138    VMSLTU_VV       -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmsltu_vv, F, T, F, UopDivType.VEC_MASK),
139    VMSLT_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmslt_vv, F, T, F, UopDivType.VEC_MASK),
140    VMSLEU_VV       -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmsleu_vv, F, T, F, UopDivType.VEC_MASK),
141    VMSLE_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vmsle_vv, F, T, F, UopDivType.VEC_MASK),
142
143    VSLL_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vsll_vv, T, F, F),
144    VSRL_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vsrl_vv, T, F, F),
145    VSRA_VV         -> OPIVV(SrcType.X, FuType.vipu, VipuType.vsra_vv, T, F, F),
146    VNSRL_WV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vnsrl_wv, T, F, F, UopDivType.VEC_NARROW),
147    VNSRA_WV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vnsra_wv, T, F, F, UopDivType.VEC_NARROW),
148
149    VSADDU_VV       -> OPIVV(SrcType.X, FuType.vipu, VipuType.vsaddu_vv, T, F, T),
150    VSADD_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vsadd_vv, T, F, T),
151    VSSUBU_VV       -> OPIVV(SrcType.X, FuType.vipu, VipuType.vssubu_vv, T, F, T),
152    VSSUB_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vssub_vv, T, F, T),
153
154    VSMUL_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T),
155
156    VSSRL_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vssrl_vv, T, F, F),
157    VSSRA_VV        -> OPIVV(SrcType.X, FuType.vipu, VipuType.vssra_vv, T, F, F),
158
159    VNCLIPU_WV      -> OPIVV(SrcType.X, FuType.vipu, VipuType.vnclipu_wv, T, F, T, UopDivType.VEC_NARROW),
160    VNCLIP_WV       -> OPIVV(SrcType.X, FuType.vipu, VipuType.vnclip_wv, T, F, T, UopDivType.VEC_NARROW),
161
162    VWREDSUMU_VS    -> OPIVV(SrcType.X, FuType.vipu, VipuType.vwredsumu_vs, T, F, F),
163    VWREDSUM_VS     -> OPIVV(SrcType.X, FuType.vipu, VipuType.vwredsum_vs, T, F, F),
164  )
165
166  val opivx: Array[(BitPat, XSDecodeBase)] = Array(
167    VADD_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vadd_vv, T, F, F),
168    VSUB_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vsub_vv, T, F, F),
169    VRSUB_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vrsub_vv, T, F, F),
170
171    VMINU_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vminu_vv, T, F, F),
172    VMIN_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmin_vv, T, F, F),
173    VMAXU_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmaxu_vv, T, F, F),
174    VMAX_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmax_vv, T, F, F),
175
176    VAND_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vand_vv, T, F, F),
177    VOR_VX        -> OPIVX(SrcType.X, FuType.vipu, VipuType.vor_vv, T, F, F),
178    VXOR_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vxor_vv, T, F, F),
179
180    VRGATHER_VX   -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F),
181
182    VSLIDEUP_VX   -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F),
183    VSLIDEDOWN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F),
184
185    VADC_VXM      -> OPIVX(SrcType.vp, FuType.vipu, VipuType.vadc_vvm, T, F, F),
186    VMADC_VXM      -> OPIVX(SrcType.vp, FuType.vipu, VipuType.vmadc_vvm, F, T, F, UopDivType.VEC_MV_MASK),
187    VMADC_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmadc_vv, F, T, F, UopDivType.VEC_MV_MASK),
188    VSBC_VXM      -> OPIVX(SrcType.vp, FuType.vipu, VipuType.vsbc_vvm, T, F, F),
189    VMSBC_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsbc_vv, F, T, F, UopDivType.VEC_MV_MASK),
190    VMSBC_VXM     -> OPIVX(SrcType.vp, FuType.vipu, VipuType.vmsbc_vvm, F, T, F, UopDivType.VEC_MV_MASK),
191
192    VMERGE_VXM    -> OPIVX(SrcType.vp, FuType.vipu, VipuType.vmerge_vvm, T, F, F),
193
194    VMV_V_X    -> OPIVX(SrcType.vp, FuType.vipu, VipuType.vmv_v_v, T, F, F),
195
196    VMSEQ_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmseq_vv, F, T, F, UopDivType.VEC_MV_MASK),
197    VMSNE_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsne_vv, F, T, F, UopDivType.VEC_MV_MASK),
198    VMSLTU_VX     -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsltu_vv, F, T, F, UopDivType.VEC_MV_MASK),
199    VMSLT_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmslt_vv, F, T, F, UopDivType.VEC_MV_MASK),
200    VMSLEU_VX     -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsleu_vv, F, T, F, UopDivType.VEC_MV_MASK),
201    VMSLE_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsle_vv, F, T, F, UopDivType.VEC_MV_MASK),
202    VMSGTU_VX     -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsgtu_vv, F, T, F, UopDivType.VEC_MV_MASK),
203    VMSGT_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vmsgt_vv, F, T, F, UopDivType.VEC_MV_MASK),
204
205    VSLL_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vsll_vv, T, F, F),
206    VSRL_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vsrl_vv, T, F, F),
207    VSRA_VX       -> OPIVX(SrcType.X, FuType.vipu, VipuType.vsra_vv, T, F, F),
208    VNSRL_WX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vnsrl_wv, T, F, F, UopDivType.VEC_MV_NARROW),
209    VNSRA_WX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vnsra_wv, T, F, F, UopDivType.VEC_MV_NARROW),
210
211    VSADDU_VX     -> OPIVX(SrcType.X, FuType.vipu, VipuType.vsaddu_vv, T, F, T),
212    VSADD_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vsadd_vv, T, F, T),
213    VSSUBU_VX     -> OPIVX(SrcType.X, FuType.vipu, VipuType.vssubu_vv, T, F, T),
214    VSSUB_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vssub_vv, T, F, T),
215
216
217    VSMUL_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T),
218
219    VSSRL_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vssrl_vv, T, F, F),
220    VSSRA_VX      -> OPIVX(SrcType.X, FuType.vipu, VipuType.vssra_vv, T, F, F),
221
222    VNCLIPU_WX    -> OPIVX(SrcType.X, FuType.vipu, VipuType.vnclipu_wv, T, F, T, UopDivType.VEC_MV_NARROW),
223    VNCLIP_WX     -> OPIVX(SrcType.X, FuType.vipu, VipuType.vnclip_wv, T, F, T, UopDivType.VEC_MV_NARROW),
224  )
225
226  val opivi: Array[(BitPat, XSDecodeBase)] = Array(
227    VADD_VI       -> OPIVI(SrcType.X, FuType.vipu, VipuType.vadd_vv,   T, F, F, SelImm.IMM_OPIVIS),
228    VRSUB_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vrsub_vv, T, F, F, SelImm.IMM_OPIVIS),
229
230    VAND_VI       -> OPIVI(SrcType.X, FuType.vipu, VipuType.vand_vv, T, F, F, SelImm.IMM_OPIVIS),
231    VOR_VI        -> OPIVI(SrcType.X, FuType.vipu, VipuType.vor_vv, T, F, F, SelImm.IMM_OPIVIS),
232    VXOR_VI       -> OPIVI(SrcType.X, FuType.vipu, VipuType.vxor_vv, T, F, F, SelImm.IMM_OPIVIS),
233
234    VRGATHER_VI   -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU),
235
236    VSLIDEUP_VI   -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU),
237    VSLIDEDOWN_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU),
238
239    VADC_VIM      -> OPIVI(SrcType.vp, FuType.vipu, VipuType.vadc_vvm, T, F, F, SelImm.IMM_OPIVIS),
240    VMADC_VIM     -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmadc_vvm, T, F, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
241    VMADC_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmadc_vv, T, F, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
242
243    VMERGE_VIM    -> OPIVI(SrcType.vp, FuType.vipu, VipuType.vmerge_vvm, T, F, F, SelImm.IMM_OPIVIS),
244
245    VMV_V_I    -> OPIVI(SrcType.vp, FuType.vipu, VipuType.vmv_v_v, T, F, F, SelImm.IMM_OPIVIS),
246
247    VMSEQ_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmseq_vv, F, T, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
248    VMSNE_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmsne_vv, F, T, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
249    VMSLEU_VI     -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmsleu_vv, F, T, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
250    VMSLE_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmsle_vv, F, T, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
251    VMSGTU_VI     -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmsgtu_vv, F, T, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
252    VMSGT_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vmsgt_vv, F, T, F, SelImm.IMM_OPIVIS, UopDivType.VEC_MASK),
253
254    VSLL_VI       -> OPIVI(SrcType.X, FuType.vipu, VipuType.vsll_vv, T, F, F, SelImm.IMM_OPIVIU),
255    VSRL_VI       -> OPIVI(SrcType.X, FuType.vipu, VipuType.vsrl_vv, T, F, F, SelImm.IMM_OPIVIU),
256    VSRA_VI       -> OPIVI(SrcType.X, FuType.vipu, VipuType.vsra_vv, T, F, F, SelImm.IMM_OPIVIU),
257    VNSRL_WI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vnsrl_wv, T, F, F, SelImm.IMM_OPIVIU, UopDivType.VEC_NARROW),
258    VNSRA_WI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vnsra_wv, T, F, F, SelImm.IMM_OPIVIU, UopDivType.VEC_NARROW),
259
260    VSADDU_VI     -> OPIVI(SrcType.X, FuType.vipu, VipuType.vsaddu_vv, T, F, T, SelImm.IMM_OPIVIS),
261    VSADD_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vsadd_vv, T, F, T, SelImm.IMM_OPIVIS),
262
263    VSSRL_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vssrl_vv, T, F, F, SelImm.IMM_OPIVIU),
264    VSSRA_VI      -> OPIVI(SrcType.X, FuType.vipu, VipuType.vssra_vv, T, F, F, SelImm.IMM_OPIVIU),
265
266    VNCLIPU_WI    -> OPIVI(SrcType.X, FuType.vipu, VipuType.vnclipu_wv, T, F, T, SelImm.IMM_OPIVIU, UopDivType.VEC_NARROW),
267    VNCLIP_WI     -> OPIVI(SrcType.X, FuType.vipu, VipuType.vnclip_wv, T, F, T, SelImm.IMM_OPIVIU, UopDivType.VEC_NARROW),
268
269    VMV1R_V       -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS),
270    VMV2R_V       -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS),
271    VMV4R_V       -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS),
272    VMV8R_V       -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS),
273  )
274
275  val opmvv: Array[(BitPat, XSDecodeBase)] = Array(
276    VAADD_VV     -> OPMVV(F, FuType.vipu, VipuType.vaadd_vv, F, T, F),
277    VAADDU_VV    -> OPMVV(F, FuType.vipu, VipuType.vaaddu_vv, F, T, F),
278    VASUB_VV     -> OPMVV(F, FuType.vipu, VipuType.vasub_vv, F, T, F),
279    VASUBU_VV    -> OPMVV(F, FuType.vipu, VipuType.vasubu_vv, F, T, F),
280    VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
281    VCPOP_M      -> OPMVV(F, FuType.vipu, VipuType.vcpop_m, T, F, F),
282    VDIV_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
283    VDIVU_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
284    VFIRST_M     -> OPMVV(F, FuType.vipu, VipuType.vfirst_m, T, F, F),
285    VID_V        -> OPMVV(F, FuType.vipu, VipuType.vid_v, F, T, F),
286    VIOTA_M      -> OPMVV(F, FuType.vipu, VipuType.viota_m, F, T, F),
287
288    // VMACC_VV     -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F),
289
290    VMADD_VV     -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F),
291    VMAND_MM     -> OPMVV(F, FuType.vipu, VipuType.vmand_mm, F, T, F),
292    VMANDN_MM    -> OPMVV(F, FuType.vipu, VipuType.vmandn_mm, F, T, F),
293    VMNAND_MM    -> OPMVV(F, FuType.vipu, VipuType.vmnand_mm, F, T, F),
294    VMNOR_MM     -> OPMVV(F, FuType.vipu, VipuType.vmnor_mm, F, T, F),
295    VMOR_MM      -> OPMVV(F, FuType.vipu, VipuType.vmor_mm, F, T, F),
296    VMORN_MM     -> OPMVV(F, FuType.vipu, VipuType.vmorn_mm, F, T, F),
297    VMXNOR_MM    -> OPMVV(F, FuType.vipu, VipuType.vmxnor_mm, F, T, F),
298    VMXOR_MM     -> OPMVV(F, FuType.vipu, VipuType.vmxor_mm, F, T, F),
299    VMSBF_M      -> OPMVV(F, FuType.vipu, VipuType.vmsbf_m, F, T, F),
300    VMSIF_M      -> OPMVV(F, FuType.vipu, VipuType.vmsif_m, F, T, F),
301    VMSOF_M      -> OPMVV(F, FuType.vipu, VipuType.vmsof_m, F, T, F),
302    VMUL_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
303    VMULH_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
304    VMULHSU_VV   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
305    VMULHU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
306
307    VMV_X_S      -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F),
308    VNMSAC_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
309    VNMSUB_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
310    VREDAND_VS   -> OPMVV(F, FuType.vipu, VipuType.vredand_vs, F, T, F),
311    VREDMAX_VS   -> OPMVV(F, FuType.vipu, VipuType.vredmax_vs, F, T, F),
312    VREDMAXU_VS  -> OPMVV(F, FuType.vipu, VipuType.vredmaxu_vs, F, T, F),
313    VREDMIN_VS   -> OPMVV(F, FuType.vipu, VipuType.vredmin_vs, F, T, F),
314    VREDMINU_VS  -> OPMVV(F, FuType.vipu, VipuType.vredminu_vs, F, T, F),
315    VREDOR_VS    -> OPMVV(F, FuType.vipu, VipuType.vredor_vs, F, T, F),
316    VREDSUM_VS   -> OPMVV(F, FuType.vipu, VipuType.vredsum_vs, F, T, F),
317    VREDXOR_VS   -> OPMVV(F, FuType.vipu, VipuType.vredxor_vs, F, T, F),
318    VREM_VV      -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
319    VREMU_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
320    VSEXT_VF2    -> OPMVV(F, FuType.vipu, VipuType.vsext_vf2, F, T, F, UopDivType.VEC_EXT2),
321    VSEXT_VF4    -> OPMVV(F, FuType.vipu, VipuType.vsext_vf4, F, T, F, UopDivType.VEC_EXT4),
322    VSEXT_VF8    -> OPMVV(F, FuType.vipu, VipuType.vsext_vf8, F, T, F, UopDivType.VEC_EXT8),
323    VZEXT_VF2    -> OPMVV(F, FuType.vipu, VipuType.vzext_vf2, F, T, F, UopDivType.VEC_EXT2),
324    VZEXT_VF4    -> OPMVV(F, FuType.vipu, VipuType.vzext_vf4, F, T, F, UopDivType.VEC_EXT4),
325    VZEXT_VF8    -> OPMVV(F, FuType.vipu, VipuType.vzext_vf8, F, T, F, UopDivType.VEC_EXT8),
326    VWADD_VV     -> OPMVV(F, FuType.vipu, VipuType.vwadd_vv, F, T, F, UopDivType.VEC_WIDE),
327    VWADD_WV     -> OPMVV(F, FuType.vipu, VipuType.vwadd_wv, F, T, F, UopDivType.VEC_WIDE0),
328    VWADDU_VV    -> OPMVV(F, FuType.vipu, VipuType.vwaddu_vv, F, T, F, UopDivType.VEC_WIDE),
329    VWADDU_WV    -> OPMVV(F, FuType.vipu, VipuType.vwaddu_wv, F, T, F, UopDivType.VEC_WIDE0),
330    VWMACC_VV    -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F),
331    VWMACCSU_VV  -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F),
332    VWMACCU_VV   -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F),
333    VWMUL_VV     -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
334    VWMULSU_VV   -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
335    VWMULU_VV    -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F),
336    VWSUB_VV     -> OPMVV(F, FuType.vipu, VipuType.vwsub_vv, F, T, F, UopDivType.VEC_WIDE),
337    VWSUB_WV     -> OPMVV(F, FuType.vipu, VipuType.vwsub_wv, F, T, F, UopDivType.VEC_WIDE0),
338    VWSUBU_VV    -> OPMVV(F, FuType.vipu, VipuType.vwsubu_vv, F, T, F, UopDivType.VEC_WIDE),
339    VWSUBU_WV    -> OPMVV(F, FuType.vipu, VipuType.vwsubu_wv, F, T, F, UopDivType.VEC_WIDE0),
340  )
341
342  val opmvx: Array[(BitPat, XSDecodeBase)] = Array(
343    VAADD_VX       -> OPMVX(F, FuType.vipu, VipuType.vaadd_vv, F, T, F),
344    VAADDU_VX      -> OPMVX(F, FuType.vipu, VipuType.vaaddu_vv, F, T, F),
345    VASUB_VX       -> OPMVX(F, FuType.vipu, VipuType.vasub_vv, F, T, F),
346    VASUBU_VX      -> OPMVX(F, FuType.vipu, VipuType.vasubu_vv, F, T, F),
347    VDIV_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
348    VDIVU_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
349    VMACC_VX       -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F),
350    VMADD_VX       -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F),
351    VMUL_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
352    VMULH_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
353    VMULHSU_VX     -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
354    VMULHU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
355    VMV_S_X        -> OPMVX(F, FuType.vipu, VipuType.vmv_s_x, F, T, F, UopDivType.VEC_MV),
356
357    VNMSAC_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
358    VNMSUB_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
359    VREM_VX        -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
360    VREMU_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
361
362    VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
363    VSLIDE1UP_VX   -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
364    VWADD_VX       -> OPMVX(F, FuType.vipu, VipuType.vwadd_vv, F, T, F, UopDivType.VEC_MV_WIDE),
365    VWADD_WX       -> OPMVX(F, FuType.vipu, VipuType.vwadd_wv, F, T, F, UopDivType.VEC_MV_WIDE0),
366    VWADDU_VX      -> OPMVX(F, FuType.vipu, VipuType.vwaddu_vv, F, T, F, UopDivType.VEC_MV_WIDE),
367    VWADDU_WX      -> OPMVX(F, FuType.vipu, VipuType.vwaddu_wv, F, T, F, UopDivType.VEC_MV_WIDE0),
368
369    // OutOfMemoryError
370    VWMACC_VX      -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F),
371    VWMACCSU_VX    -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F),
372    VWMACCU_VX     -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F),
373
374    VWMACCUS_VX    -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F),
375    VWMUL_VX       -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
376    VWMULSU_VX     -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
377    // Ok
378    VWMULU_VX      -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F),
379    VWSUB_VX       -> OPMVX(F, FuType.vipu, VipuType.vwsub_vv, F, T, F, UopDivType.VEC_MV_WIDE),
380    VWSUB_WX       -> OPMVX(F, FuType.vipu, VipuType.vwsub_wv, F, T, F, UopDivType.VEC_MV_WIDE0),
381    VWSUBU_VX      -> OPMVX(F, FuType.vipu, VipuType.vwsubu_vv, F, T, F, UopDivType.VEC_MV_WIDE),
382    VWSUBU_WX      -> OPMVX(F, FuType.vipu, VipuType.vwsubu_wv, F, T, F, UopDivType.VEC_MV_WIDE0),
383  )
384
385  val opfvv: Array[(BitPat, XSDecodeBase)] = Array(
386    // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
387    VFADD_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fadd , F, T, F),
388    VFSUB_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fsub, F, T, F),
389
390    // 13.3. Vector Widening Floating-Point Add/Subtract Instructions
391    VFWADD_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
392    VFWSUB_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
393    VFWADD_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
394    VFWSUB_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
395
396    // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
397    VFMUL_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
398    VFDIV_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fdiv , F, T, F),
399
400    // 13.5. Vector Widening Floating-Point Multiply
401    VFWMUL_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
402
403    // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
404    VFMACC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.fmacc, F, T, F),
405    VFNMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
406    VFMSAC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
407    VFNMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
408    VFMADD_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
409    VFNMADD_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
410    VFMSUB_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
411    VFNMSUB_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
412
413    // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
414    VFWMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
415    VFWNMACC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
416    VFWMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
417    VFWNMSAC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
418
419    // 13.8. Vector Floating-Point Square-Root Instruction
420    VFSQRT_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
421
422    // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
423    VFRSQRT7_V         -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
424
425    // 13.10. Vector Floating-Point Reciprocal Estimate Instruction
426    VFREC7_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
427
428    // 13.11. Vector Floating-Point MIN/MAX Instructions
429    VFMIN_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fmin, F, T, F),
430    VFMAX_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fmax, F, T, F),
431
432    // 13.12. Vector Floating-Point Sign-Injection Instructions
433    VFSGNJ_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
434    VFSGNJN_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
435    VFSGNJX_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
436
437    // 13.13. Vector Floating-Point Compare Instructions
438    VMFEQ_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
439    VMFNE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
440    VMFLT_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
441    VMFLE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
442
443    // 13.14. Vector Floating-Point Classify Instruction
444    VFCLASS_V          -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
445
446    // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
447    VFCVT_XU_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
448    VFCVT_X_F_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
449    VFCVT_RTZ_XU_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
450    VFCVT_RTZ_X_F_V    -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
451    VFCVT_F_XU_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
452    VFCVT_F_X_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
453
454    // 13.18. Widening Floating-Point/Integer Type-Convert Instructions
455    VFWCVT_XU_F_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
456    VFWCVT_X_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
457    VFWCVT_RTZ_XU_F_V  -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
458    VFWCVT_RTZ_X_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
459    VFWCVT_F_XU_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
460    VFWCVT_F_X_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
461    VFWCVT_F_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
462
463    // !
464    // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
465    VFNCVT_XU_F_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
466    VFNCVT_X_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
467    VFNCVT_RTZ_XU_F_W  -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
468    VFNCVT_RTZ_X_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
469    VFNCVT_F_XU_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
470    VFNCVT_F_X_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
471    VFNCVT_F_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
472    VFNCVT_ROD_F_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
473
474    // 14.3. Vector Single-Width Floating-Point Reduction Instructions
475    VFREDOSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
476    VFREDUSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
477    VFREDMAX_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
478    VFREDMIN_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
479
480    // 14.4. Vector Widening Floating-Point Reduction Instructions
481    VFWREDOSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
482    VFWREDUSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
483
484    // 16.2. Floating-Point Scalar Move Instructions
485    VFMV_F_S           -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// f[rd] = vs2[0] (rs1=0)
486  )
487
488  val opfvf: Array[(BitPat, XSDecodeBase)] = Array(
489    // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
490    VFADD_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fadd , F, T, F),
491    VFSUB_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fsub, F, T, F),
492    VFRSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
493
494    // 13.3. Vector Widening Floating-Point Add/Subtract Instructions
495    VFWADD_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
496    VFWSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
497    VFWADD_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
498    VFWSUB_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
499
500    // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
501    VFMUL_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
502    VFDIV_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fdiv , F, T, F),
503    VFRDIV_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
504
505    // 13.5. Vector Widening Floating-Point Multiply
506    VFWMUL_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
507
508    // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
509    VFMACC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.fmacc, F, T, F),
510    VFNMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
511    VFMSAC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
512    VFNMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
513    VFMADD_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
514    VFNMADD_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
515    VFMSUB_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
516    VFNMSUB_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
517
518    // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
519    VFWMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
520    VFWNMACC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
521    VFWMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
522    VFWNMSAC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F),
523
524    // 13.11. Vector Floating-Point MIN/MAX Instructions
525    VFMIN_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fmin, F, T, F),
526    VFMAX_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fmax, F, T, F),
527
528    // 13.12. Vector Floating-Point Sign-Injection Instructions
529    VFSGNJ_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
530    VFSGNJN_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
531    VFSGNJX_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
532
533    // 13.13. Vector Floating-Point Compare Instructions
534    VMFEQ_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T),
535    VMFNE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T),
536    VMFLT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T),
537    VMFLE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T),
538    VMFGT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T),
539    VMFGE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T),
540
541    // 13.15. Vector Floating-Point Merge Instruction
542    VFMERGE_VFM        -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),
543
544    // 13.16. Vector Floating-Point Move Instruction
545    VFMV_V_F           -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// src2=SrcType.X
546
547    // 16.2. Floating-Point Scalar Move Instructions
548    VFMV_S_F           -> OPFVF(SrcType.fp, SrcType.vp, FuType.vppu, VppuType.f2s  , F, T, F),// vs2=0 // vs3 = vd
549
550    // 16.3.3. Vector Slide1up
551    VFSLIDE1UP_VF      -> OPFVF(SrcType.fp, SrcType.X , FuType.vppu, VppuType.vslide1up, F, T, F),// vd[0]=f[rs1], vd[i+1] = vs2[i]
552
553    // 16.3.4. Vector Slide1down Instruction
554    // vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1]
555    VFSLIDE1DOWN_VF    -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1]
556  )
557
558  val vset: Array[(BitPat, XSDecodeBase)] = Array(
559    VSETVLI   -> VSET(F, T, ALUOpType.vsetvli1,  F, SelImm.IMM_VSETVLI),
560    VSETIVLI  -> VSET(T, T, ALUOpType.vsetivli1, F, SelImm.IMM_VSETIVLI),
561    VSETVL    -> VSET(F, F, ALUOpType.vsetvl1,   T, SelImm.X), // flush pipe
562  )
563
564  val vls: Array[(BitPat, XSDecodeBase)] = Array(
565    // 7.4. Vector Unit-Stride Instructions
566    VLE8_V        -> VLD(SrcType.X,   VlduType.dummy),
567    VLE16_V       -> VLD(SrcType.X,   VlduType.dummy),
568    VLE32_V       -> VLD(SrcType.X,   VlduType.dummy),
569    VLE64_V       -> VLD(SrcType.X,   VlduType.dummy),
570    VSE8_V        -> VST(SrcType.X,   VstuType.dummy),
571    VSE16_V       -> VST(SrcType.X,   VstuType.dummy),
572    VSE32_V       -> VST(SrcType.X,   VstuType.dummy),
573    VSE64_V       -> VST(SrcType.X,   VstuType.dummy),
574    VLM_V         -> VLD(SrcType.X,   VlduType.dummy, mask = T),
575    VSM_V         -> VST(SrcType.X,   VstuType.dummy, mask = T),
576    // 7.5. Vector Strided Instructions
577    VLSE8_V       -> VLD(SrcType.xp,  VlduType.dummy, strided = T),
578    VLSE16_V      -> VLD(SrcType.xp,  VlduType.dummy, strided = T),
579    VLSE32_V      -> VLD(SrcType.xp,  VlduType.dummy, strided = T),
580    VLSE64_V      -> VLD(SrcType.xp,  VlduType.dummy, strided = T),
581    VSSE8_V       -> VST(SrcType.xp,  VstuType.dummy, strided = T),
582    VSSE16_V      -> VST(SrcType.xp,  VstuType.dummy, strided = T),
583    VSSE32_V      -> VST(SrcType.xp,  VstuType.dummy, strided = T),
584    VSSE64_V      -> VST(SrcType.xp,  VstuType.dummy, strided = T),
585    // 7.6. Vector Indexed Instructions
586    VLUXEI8_V     -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = F),
587    VLUXEI16_V    -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = F),
588    VLUXEI32_V    -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = F),
589    VLUXEI64_V    -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = F),
590    VLOXEI8_V     -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = T),
591    VLOXEI16_V    -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = T),
592    VLOXEI32_V    -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = T),
593    VLOXEI64_V    -> VLD(SrcType.vp,  VlduType.dummy, indexed = T, ordered = T),
594    VSUXEI8_V     -> VLD(SrcType.vp,  VstuType.dummy, indexed = T, ordered = F),
595    VSUXEI16_V    -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = F),
596    VSUXEI32_V    -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = F),
597    VSUXEI64_V    -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = F),
598    VSOXEI8_V     -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = T),
599    VSOXEI16_V    -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = T),
600    VSOXEI32_V    -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = T),
601    VSOXEI64_V    -> VST(SrcType.vp,  VstuType.dummy, indexed = T, ordered = T),
602    // 7.7. Unit-stride Fault-Only-First Loads
603    VLE8FF_V      -> VLD(SrcType.X,   VlduType.dummy, ff = T),
604    VLE16FF_V     -> VLD(SrcType.X,   VlduType.dummy, ff = T),
605    VLE32FF_V     -> VLD(SrcType.X,   VlduType.dummy, ff = T),
606    VLE64FF_V     -> VLD(SrcType.X,   VlduType.dummy, ff = T),
607    // 7.8. Vector Load/Store Segment Instructions
608    // 7.8.1. Vector Unit-Stride Segment Loads and Stores
609    // TODO
610    // 7.8.2. Vector Strided Segment Loads and Stores
611    // TODO
612    // 7.8.3. Vector Indexed Segment Loads and Stores
613    // TODO
614    // 7.9. Vector Load/Store Whole Register Instructions
615    VL1RE8_V      -> VLD(SrcType.X,   VlduType.dummy, whole = T),
616    VL1RE16_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
617    VL1RE32_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
618    VL1RE64_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
619    VL2RE8_V      -> VLD(SrcType.X,   VlduType.dummy, whole = T),
620    VL2RE16_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
621    VL2RE32_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
622    VL2RE64_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
623    VL4RE8_V      -> VLD(SrcType.X,   VlduType.dummy, whole = T),
624    VL4RE16_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
625    VL4RE32_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
626    VL4RE64_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
627    VL8RE8_V      -> VLD(SrcType.X,   VlduType.dummy, whole = T),
628    VL8RE16_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
629    VL8RE32_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
630    VL8RE64_V     -> VLD(SrcType.X,   VlduType.dummy, whole = T),
631    VS1R_V        -> VST(SrcType.X,   VlduType.dummy, whole = T),
632    VS2R_V        -> VST(SrcType.X,   VlduType.dummy, whole = T),
633    VS4R_V        -> VST(SrcType.X,   VlduType.dummy, whole = T),
634    VS8R_V        -> VST(SrcType.X,   VlduType.dummy, whole = T),
635  )
636
637  override val decodeArray: Array[(BitPat, XSDecodeBase)] = vset ++ vls ++
638    opivv ++ opivx ++ opivi ++ opmvv ++ opmvx ++ opfvv ++ opfvf
639}
640