1package xiangshan.backend.decode 2 3import chipsalliance.rocketchip.config.Parameters 4import chisel3._ 5import chisel3.util.BitPat.bitPatToUInt 6import chisel3.util._ 7import freechips.rocketchip.util.uintToBitPat 8import freechips.rocketchip.rocket.Instructions._ 9import utils._ 10import xiangshan.ExceptionNO.illegalInstr 11import xiangshan._ 12import yunsuan.{VfpuType, VipuType} 13 14abstract class VecDecode extends XSDecodeBase { 15 def generate() : List[BitPat] 16 def asOldDecodeOutput(): List[BitPat] = { 17 val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 18 List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm) 19 } 20 def asFirstStageDecodeOutput(): List[BitPat] = { 21 val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 22 List (src1, src2, src3, fu, fuOp, xWen, fWen, bitPatToUInt(vWen) | bitPatToUInt(mWen), xsTrap, noSpec, blockBack, flushPipe, selImm) 23 } 24} 25 26case class OPIVV(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 27 def generate() : List[BitPat] = { 28 XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, 29 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 30 } 31} 32 33case class OPIVX(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 34 def generate() : List[BitPat] = { 35 XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 36 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 37 } 38} 39 40case class OPIVI(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, selImm: BitPat) extends XSDecodeBase { 41 def generate() : List[BitPat] = { 42 XSDecode(SrcType.imm, SrcType.vp, src3, fu, fuOp, selImm, 43 xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 44 } 45} 46 47case class OPMVV(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 48 private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 49 def generate() : List[BitPat] = { 50 XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, xWen, F, vWen, mWen, F, F, F, F).generate() 51 } 52} 53 54case class OPMVX(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 55 private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 56 def generate() : List[BitPat] = { 57 XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 58 xWen = xWen, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 59 } 60} 61 62case class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 63 def generate() : List[BitPat] = { 64 XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 65 xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 66 } 67} 68 69case class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 70 def generate() : List[BitPat] = { 71 XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 72 xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 73 } 74} 75 76case class VSET(vli: Boolean, vtypei: Boolean, fuOp: BitPat, flushPipe: Boolean, selImm: BitPat) extends XSDecodeBase { 77 def generate() : List[BitPat] = { 78 val src1 = if (vli) SrcType.imm else SrcType.xp 79 val src2 = if (vtypei) SrcType.imm else SrcType.xp 80 XSDecode(src1, src2, SrcType.X, FuType.alu, fuOp, selImm, 81 xWen = T, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = flushPipe).generate() 82 } 83} 84 85case class VLD(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, ff: Boolean = false, 86 mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 87 def generate() : List[BitPat] = { 88 val fu = FuType.vldu 89 val src1 = SrcType.xp 90 val src3 = SrcType.X 91 XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 92 xWen = F, fWen = F, vWen = T, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 93 } 94} 95 96case class VST(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, 97 mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 98 def generate() : List[BitPat] = { 99 val fu = FuType.vstu 100 val src1 = SrcType.xp 101 val src3 = SrcType.vp 102 XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 103 xWen = F, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 104 } 105} 106 107object VecDecoder extends DecodeConstants { 108 val opivv: Array[(BitPat, XSDecodeBase)] = Array( 109 VADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.add, T, F, F), 110 VSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.sub, T, F, F), 111 112 VMINU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 113 VMIN_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 114 VMAXU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 115 VMAX_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 116 117 VAND_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 118 VOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 119 VXOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 120 121 VRGATHER_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 122 VRGATHEREI16_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 123 124 VADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 125 VMADC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 126 VMADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 127 128 VSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 129 VMSBC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 130 VMSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 131 132 VMERGE_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 133 134 VMSEQ_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 135 VMSNE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 136 VMSLTU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 137 VMSLT_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 138 VMSLEU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 139 VMSLE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 140 141 VSLL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 142 VSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 143 VSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 144 VNSRL_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 145 VNSRA_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 146 147 VSADDU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 148 VSADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 149 VSSUBU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 150 VSSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 151 152 VSMUL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 153 154 VSSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 155 VSSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 156 157 VNCLIPU_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 158 VNCLIP_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 159 160 VWREDSUMU_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 161 VWREDSUM_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 162 ) 163 164 val opivx: Array[(BitPat, XSDecodeBase)] = Array( 165 VADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.add, T, F, F), 166 VSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.sub, T, F, F), 167 VRSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 168 169 VMINU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 170 VMIN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 171 VMAXU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 172 VMAX_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 173 174 VAND_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 175 VOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 176 VXOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 177 178 VRGATHER_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 179 180 VSLIDEUP_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 181 VSLIDEDOWN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 182 183 VADC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 184 VMADC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 185 VSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 186 VMSBC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 187 VMSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 188 189 VMERGE_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 190 191 VMSEQ_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 192 VMSNE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 193 VMSLTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 194 VMSLT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 195 VMSLEU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 196 VMSLE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 197 VMSGTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 198 VMSGT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 199 200 VSLL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 201 VSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 202 VSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 203 VNSRL_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 204 VNSRA_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 205 206 VSADDU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 207 VSADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 208 VSSUBU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 209 VSSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 210 211 212 VSMUL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 213 214 VSSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 215 VSSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 216 217 VNCLIPU_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 218 VNCLIP_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 219 ) 220 221 val opivi: Array[(BitPat, XSDecodeBase)] = Array( 222 VADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.add, T, F, F, SelImm.IMM_OPIVIS), 223 VRSUB_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 224 225 VAND_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 226 VOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 227 VXOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 228 229 VRGATHER_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 230 231 VSLIDEUP_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 232 VSLIDEDOWN_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 233 234 VADC_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 235 VMADC_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 236 237 VMERGE_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 238 239 VMSEQ_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 240 VMSNE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 241 VMSLEU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 242 VMSLE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 243 VMSGTU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 244 VMSGT_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 245 246 VSLL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 247 VSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 248 VSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 249 VNSRL_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 250 VNSRA_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 251 252 VSADDU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 253 VSADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 254 255 VSSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 256 VSSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 257 258 VNCLIPU_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 259 VNCLIP_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 260 261 VMV1R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 262 VMV2R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 263 VMV4R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 264 VMV8R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 265 ) 266 267 val opmvv: Array[(BitPat, XSDecodeBase)] = Array( 268 VAADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 269 VAADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 270 VASUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 271 VASUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 272 VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 273 VCPOP_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 274 VDIV_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 275 VDIVU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 276 VFIRST_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 277 VID_V -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 278 VIOTA_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 279 280 // VMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 281 282 VMADD_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 283 VMAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 284 VMANDN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 285 VMNAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 286 VMNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 287 VMOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 288 VMORN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 289 VMXNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 290 VMXOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 291 VMSBF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 292 VMSIF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 293 VMSOF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 294 VMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 295 VMULH_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 296 VMULHSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 297 VMULHU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 298 299 VMV_X_S -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 300 VNMSAC_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 301 VNMSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 302 VREDAND_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 303 VREDMAX_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 304 VREDMAXU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 305 VREDMIN_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 306 VREDMINU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 307 VREDOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 308 VREDSUM_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 309 VREDXOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 310 VREM_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 311 VREMU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 312 VSEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 313 VSEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 314 VSEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 315 VZEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 316 VZEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 317 VZEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 318 VWADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 319 VWADD_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 320 VWADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 321 VWADDU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 322 VWMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 323 VWMACCSU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 324 VWMACCU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 325 VWMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 326 VWMULSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 327 VWMULU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 328 VWSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 329 VWSUB_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 330 VWSUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 331 VWSUBU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 332 ) 333 334 val opmvx: Array[(BitPat, XSDecodeBase)] = Array( 335 VAADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 336 VAADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 337 VASUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 338 VASUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 339 VDIV_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 340 VDIVU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 341 VMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 342 VMADD_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 343 VMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 344 VMULH_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 345 VMULHSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 346 VMULHU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 347 VMV_S_X -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 348 349 VNMSAC_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 350 VNMSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 351 VREM_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 352 VREMU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 353 354 VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 355 VSLIDE1UP_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 356 VWADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 357 VWADD_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 358 VWADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 359 VWADDU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 360 361 // OutOfMemoryError 362 VWMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 363 VWMACCSU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 364 VWMACCU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 365 366 VWMACCUS_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 367 VWMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 368 VWMULSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 369 // Ok 370 VWMULU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 371 VWSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 372 VWSUB_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 373 VWSUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 374 VWSUBU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 375 ) 376 377 val opfvv: Array[(BitPat, XSDecodeBase)] = Array( 378 // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 379 VFADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 380 VFSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 381 382 // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 383 VFWADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 384 VFWSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 385 VFWADD_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 386 VFWSUB_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 387 388 // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 389 VFMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 390 VFDIV_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 391 392 // 13.5. Vector Widening Floating-Point Multiply 393 VFWMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 394 395 // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 396 VFMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 397 VFNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 398 VFMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 399 VFNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 400 VFMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 401 VFNMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 402 VFMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 403 VFNMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 404 405 // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 406 VFWMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 407 VFWNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 408 VFWMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 409 VFWNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 410 411 // 13.8. Vector Floating-Point Square-Root Instruction 412 VFSQRT_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 413 414 // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction 415 VFRSQRT7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 416 417 // 13.10. Vector Floating-Point Reciprocal Estimate Instruction 418 VFREC7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 419 420 // 13.11. Vector Floating-Point MIN/MAX Instructions 421 VFMIN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 422 VFMAX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 423 424 // 13.12. Vector Floating-Point Sign-Injection Instructions 425 VFSGNJ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 426 VFSGNJN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 427 VFSGNJX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 428 429 // 13.13. Vector Floating-Point Compare Instructions 430 VMFEQ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 431 VMFNE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 432 VMFLT_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 433 VMFLE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 434 435 // 13.14. Vector Floating-Point Classify Instruction 436 VFCLASS_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 437 438 // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions 439 VFCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 440 VFCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 441 VFCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 442 VFCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 443 VFCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 444 VFCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 445 446 // 13.18. Widening Floating-Point/Integer Type-Convert Instructions 447 VFWCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 448 VFWCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 449 VFWCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 450 VFWCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 451 VFWCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 452 VFWCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 453 VFWCVT_F_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 454 455 // ! 456 // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions 457 VFNCVT_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 458 VFNCVT_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 459 VFNCVT_RTZ_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 460 VFNCVT_RTZ_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 461 VFNCVT_F_XU_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 462 VFNCVT_F_X_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 463 VFNCVT_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 464 VFNCVT_ROD_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 465 466 // 14.3. Vector Single-Width Floating-Point Reduction Instructions 467 VFREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 468 VFREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 469 VFREDMAX_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 470 VFREDMIN_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 471 472 // 14.4. Vector Widening Floating-Point Reduction Instructions 473 VFWREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 474 VFWREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 475 476 // 16.2. Floating-Point Scalar Move Instructions 477 VFMV_F_S -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// f[rd] = vs2[0] (rs1=0) 478 ) 479 480 val opfvf: Array[(BitPat, XSDecodeBase)] = Array( 481 // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 482 VFADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 483 VFSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 484 VFRSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 485 486 // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 487 VFWADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 488 VFWSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 489 VFWADD_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 490 VFWSUB_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 491 492 // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 493 VFMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 494 VFDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 495 VFRDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 496 497 // 13.5. Vector Widening Floating-Point Multiply 498 VFWMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 499 500 // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 501 VFMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 502 VFNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 503 VFMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 504 VFNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 505 VFMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 506 VFNMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 507 VFMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 508 VFNMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 509 510 // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 511 VFWMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 512 VFWNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 513 VFWMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 514 VFWNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 515 516 // 13.11. Vector Floating-Point MIN/MAX Instructions 517 VFMIN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 518 VFMAX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 519 520 // 13.12. Vector Floating-Point Sign-Injection Instructions 521 VFSGNJ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 522 VFSGNJN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 523 VFSGNJX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 524 525 // 13.13. Vector Floating-Point Compare Instructions 526 VMFEQ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 527 VMFNE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 528 VMFLT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 529 VMFLE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 530 VMFGT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 531 VMFGE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 532 533 // 13.15. Vector Floating-Point Merge Instruction 534 VFMERGE_VFM -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 535 536 // 13.16. Vector Floating-Point Move Instruction 537 VFMV_V_F -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// src2=SrcType.X 538 539 // 16.2. Floating-Point Scalar Move Instructions 540 VFMV_S_F -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vs2=0 541 542 // 16.3.3. Vector Slide1up 543 // vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i] 544 VFSLIDE1UP_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[0]=f[rs1], vd[i+1] = vs2[i] 545 546 // 16.3.4. Vector Slide1down Instruction 547 // vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1] 548 VFSLIDE1DOWN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1] 549 ) 550 551 val vset: Array[(BitPat, XSDecodeBase)] = Array( 552 VSETVLI -> VSET(F, T, ALUOpType.vsetvli1, F, SelImm.IMM_VSETVLI), 553 VSETIVLI -> VSET(T, T, ALUOpType.vsetivli1, F, SelImm.IMM_VSETIVLI), 554 VSETVL -> VSET(F, F, ALUOpType.vsetvl1, T, SelImm.X), // flush pipe 555 ) 556 557 val vls: Array[(BitPat, XSDecodeBase)] = Array( 558 // 7.4. Vector Unit-Stride Instructions 559 VLE8_V -> VLD(SrcType.X, VlduType.dummy), 560 VLE16_V -> VLD(SrcType.X, VlduType.dummy), 561 VLE32_V -> VLD(SrcType.X, VlduType.dummy), 562 VLE64_V -> VLD(SrcType.X, VlduType.dummy), 563 VSE8_V -> VST(SrcType.X, VstuType.dummy), 564 VSE16_V -> VST(SrcType.X, VstuType.dummy), 565 VSE32_V -> VST(SrcType.X, VstuType.dummy), 566 VSE64_V -> VST(SrcType.X, VstuType.dummy), 567 VLM_V -> VLD(SrcType.X, VlduType.dummy, mask = T), 568 VSM_V -> VST(SrcType.X, VstuType.dummy, mask = T), 569 // 7.5. Vector Strided Instructions 570 VLSE8_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 571 VLSE16_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 572 VLSE32_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 573 VLSE64_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 574 VSSE8_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 575 VSSE16_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 576 VSSE32_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 577 VSSE64_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 578 // 7.6. Vector Indexed Instructions 579 VLUXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 580 VLUXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 581 VLUXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 582 VLUXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 583 VLOXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 584 VLOXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 585 VLOXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 586 VLOXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 587 VSUXEI8_V -> VLD(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 588 VSUXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 589 VSUXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 590 VSUXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 591 VSOXEI8_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 592 VSOXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 593 VSOXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 594 VSOXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 595 // 7.7. Unit-stride Fault-Only-First Loads 596 VLE8FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 597 VLE16FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 598 VLE32FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 599 VLE64FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 600 // 7.8. Vector Load/Store Segment Instructions 601 // 7.8.1. Vector Unit-Stride Segment Loads and Stores 602 // TODO 603 // 7.8.2. Vector Strided Segment Loads and Stores 604 // TODO 605 // 7.8.3. Vector Indexed Segment Loads and Stores 606 // TODO 607 // 7.9. Vector Load/Store Whole Register Instructions 608 VL1RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 609 VL1RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 610 VL1RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 611 VL1RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 612 VL2RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 613 VL2RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 614 VL2RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 615 VL2RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 616 VL4RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 617 VL4RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 618 VL4RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 619 VL4RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 620 VL8RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 621 VL8RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 622 VL8RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 623 VL8RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 624 VS1R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 625 VS2R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 626 VS4R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 627 VS8R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 628 ) 629 630 override val decodeArray: Array[(BitPat, XSDecodeBase)] = vset ++ vls ++ 631 opivv ++ opivx ++ opivi ++ opmvv ++ opmvx ++ opfvv ++ opfvf 632} 633