17f2b7720SXuan Hupackage xiangshan.backend.decode 27f2b7720SXuan Hu 37f2b7720SXuan Huimport chipsalliance.rocketchip.config.Parameters 47f2b7720SXuan Huimport chisel3._ 5912e2179SXuan Huimport chisel3.util.BitPat.bitPatToUInt 67f2b7720SXuan Huimport chisel3.util._ 77f2b7720SXuan Huimport freechips.rocketchip.util.uintToBitPat 83a2e64c4SZhangZifeiimport freechips.rocketchip.rocket.Instructions._ 97f2b7720SXuan Huimport utils._ 107f2b7720SXuan Huimport xiangshan.ExceptionNO.illegalInstr 117f2b7720SXuan Huimport xiangshan._ 1299e169c5Sczwimport yunsuan.{VfpuType, VipuType, VppuType} 137f2b7720SXuan Hu 14b65b9ebaSXuan Huabstract class VecDecode extends XSDecodeBase { 157f2b7720SXuan Hu def generate() : List[BitPat] 167f2b7720SXuan Hu def asOldDecodeOutput(): List[BitPat] = { 17912e2179SXuan Hu val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 187f2b7720SXuan Hu List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm) 197f2b7720SXuan Hu } 20912e2179SXuan Hu def asFirstStageDecodeOutput(): List[BitPat] = { 21912e2179SXuan Hu val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 22912e2179SXuan Hu List (src1, src2, src3, fu, fuOp, xWen, fWen, bitPatToUInt(vWen) | bitPatToUInt(mWen), xsTrap, noSpec, blockBack, flushPipe, selImm) 23912e2179SXuan Hu } 247f2b7720SXuan Hu} 257f2b7720SXuan Hu 26b65b9ebaSXuan Hucase class OPIVV(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 277f2b7720SXuan Hu def generate() : List[BitPat] = { 28b65b9ebaSXuan Hu XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, 29b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 307f2b7720SXuan Hu } 317f2b7720SXuan Hu} 327f2b7720SXuan Hu 33b65b9ebaSXuan Hucase class OPIVX(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 3458c35d23Shuxuan0307 def generate() : List[BitPat] = { 35b65b9ebaSXuan Hu XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 36b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 3758c35d23Shuxuan0307 } 387f2b7720SXuan Hu} 397f2b7720SXuan Hu 40b65b9ebaSXuan Hucase class OPIVI(src3: BitPat, fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, selImm: BitPat) extends XSDecodeBase { 4158c35d23Shuxuan0307 def generate() : List[BitPat] = { 42b65b9ebaSXuan Hu XSDecode(SrcType.imm, SrcType.vp, src3, fu, fuOp, selImm, 43b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 4458c35d23Shuxuan0307 } 457f2b7720SXuan Hu} 467f2b7720SXuan Hu 47b65b9ebaSXuan Hucase class OPMVV(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 48c6661c33SHaojin Tang private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 497f2b7720SXuan Hu def generate() : List[BitPat] = { 50b65b9ebaSXuan Hu XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, xWen, F, vWen, mWen, F, F, F, F).generate() 517f2b7720SXuan Hu } 527f2b7720SXuan Hu} 537f2b7720SXuan Hu 54b65b9ebaSXuan Hucase class OPMVX(vdRen: Boolean, fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 55c6661c33SHaojin Tang private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 56c6661c33SHaojin Tang def generate() : List[BitPat] = { 57b65b9ebaSXuan Hu XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 58b65b9ebaSXuan Hu xWen = xWen, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 59c6661c33SHaojin Tang } 607f2b7720SXuan Hu} 617f2b7720SXuan Hu 62b65b9ebaSXuan Hucase class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 63b448988dSczw def generate() : List[BitPat] = { 64b65b9ebaSXuan Hu XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 65b65b9ebaSXuan Hu xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 66b448988dSczw } 677f2b7720SXuan Hu} 687f2b7720SXuan Hu 69b65b9ebaSXuan Hucase class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 707f2b7720SXuan Hu def generate() : List[BitPat] = { 71b65b9ebaSXuan Hu XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 72b65b9ebaSXuan Hu xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 737f2b7720SXuan Hu } 747f2b7720SXuan Hu} 757f2b7720SXuan Hu 76b65b9ebaSXuan Hucase class VSET(vli: Boolean, vtypei: Boolean, fuOp: BitPat, flushPipe: Boolean, selImm: BitPat) extends XSDecodeBase { 77912e2179SXuan Hu def generate() : List[BitPat] = { 78912e2179SXuan Hu val src1 = if (vli) SrcType.imm else SrcType.xp 79912e2179SXuan Hu val src2 = if (vtypei) SrcType.imm else SrcType.xp 80b65b9ebaSXuan Hu XSDecode(src1, src2, SrcType.X, FuType.alu, fuOp, selImm, 81b65b9ebaSXuan Hu xWen = T, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = flushPipe).generate() 82912e2179SXuan Hu } 837f2b7720SXuan Hu} 847f2b7720SXuan Hu 85912e2179SXuan Hucase class VLD(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, ff: Boolean = false, 86b65b9ebaSXuan Hu mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 87912e2179SXuan Hu def generate() : List[BitPat] = { 88912e2179SXuan Hu val fu = FuType.vldu 89912e2179SXuan Hu val src1 = SrcType.xp 90912e2179SXuan Hu val src3 = SrcType.X 91b65b9ebaSXuan Hu XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 92b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = T, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 93912e2179SXuan Hu } 94912e2179SXuan Hu} 95912e2179SXuan Hu 96912e2179SXuan Hucase class VST(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, 97b65b9ebaSXuan Hu mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 98912e2179SXuan Hu def generate() : List[BitPat] = { 99912e2179SXuan Hu val fu = FuType.vstu 100912e2179SXuan Hu val src1 = SrcType.xp 101912e2179SXuan Hu val src3 = SrcType.vp 102b65b9ebaSXuan Hu XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 103b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 104912e2179SXuan Hu } 1057f2b7720SXuan Hu} 1067f2b7720SXuan Hu 1077f2b7720SXuan Huobject VecDecoder extends DecodeConstants { 108b65b9ebaSXuan Hu val opivv: Array[(BitPat, XSDecodeBase)] = Array( 1090f038924SZhangZifei VADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.add, T, F, F), 1100f038924SZhangZifei VSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.sub, T, F, F), 1117f2b7720SXuan Hu 112912e2179SXuan Hu VMINU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 113912e2179SXuan Hu VMIN_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 114912e2179SXuan Hu VMAXU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 115912e2179SXuan Hu VMAX_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 11658c35d23Shuxuan0307 117912e2179SXuan Hu VAND_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 118912e2179SXuan Hu VOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 119912e2179SXuan Hu VXOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 12058c35d23Shuxuan0307 121912e2179SXuan Hu VRGATHER_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 122912e2179SXuan Hu VRGATHEREI16_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 12358c35d23Shuxuan0307 124*bae0e6e5Sczw VADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.adc, T, F, F), 125*bae0e6e5Sczw VMADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.madc, F, T, F), 126*bae0e6e5Sczw VMADC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.madc0, F, T, F), 12758c35d23Shuxuan0307 128912e2179SXuan Hu VSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 129912e2179SXuan Hu VMSBC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 130912e2179SXuan Hu VMSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 13158c35d23Shuxuan0307 132912e2179SXuan Hu VMERGE_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 13358c35d23Shuxuan0307 134912e2179SXuan Hu VMSEQ_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 135912e2179SXuan Hu VMSNE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 136912e2179SXuan Hu VMSLTU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 137912e2179SXuan Hu VMSLT_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 138912e2179SXuan Hu VMSLEU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 139912e2179SXuan Hu VMSLE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 14058c35d23Shuxuan0307 141912e2179SXuan Hu VSLL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 142912e2179SXuan Hu VSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 143912e2179SXuan Hu VSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 144912e2179SXuan Hu VNSRL_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 145912e2179SXuan Hu VNSRA_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 14658c35d23Shuxuan0307 147912e2179SXuan Hu VSADDU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 148912e2179SXuan Hu VSADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 149912e2179SXuan Hu VSSUBU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 150912e2179SXuan Hu VSSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 15158c35d23Shuxuan0307 152912e2179SXuan Hu VSMUL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 15358c35d23Shuxuan0307 154912e2179SXuan Hu VSSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 155912e2179SXuan Hu VSSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 15658c35d23Shuxuan0307 157912e2179SXuan Hu VNCLIPU_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 158912e2179SXuan Hu VNCLIP_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 15958c35d23Shuxuan0307 160912e2179SXuan Hu VWREDSUMU_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 161912e2179SXuan Hu VWREDSUM_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 1627f2b7720SXuan Hu ) 1637f2b7720SXuan Hu 164b65b9ebaSXuan Hu val opivx: Array[(BitPat, XSDecodeBase)] = Array( 1650f038924SZhangZifei VADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.add, T, F, F), 1660f038924SZhangZifei VSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.sub, T, F, F), 167*bae0e6e5Sczw VRSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.rsub, T, F, F), 16858c35d23Shuxuan0307 169912e2179SXuan Hu VMINU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 170912e2179SXuan Hu VMIN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 171912e2179SXuan Hu VMAXU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 172912e2179SXuan Hu VMAX_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17358c35d23Shuxuan0307 174912e2179SXuan Hu VAND_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 175912e2179SXuan Hu VOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 176912e2179SXuan Hu VXOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17758c35d23Shuxuan0307 178912e2179SXuan Hu VRGATHER_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17958c35d23Shuxuan0307 180912e2179SXuan Hu VSLIDEUP_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 181912e2179SXuan Hu VSLIDEDOWN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 18258c35d23Shuxuan0307 183*bae0e6e5Sczw VADC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.adc, T, F, F), 184*bae0e6e5Sczw VMADC_VXM -> OPIVX(SrcType.X, FuType.vipu, VipuType.madc, F, T, F), 185*bae0e6e5Sczw VMADC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.madc0, F, T, F), 186912e2179SXuan Hu VSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 187912e2179SXuan Hu VMSBC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 188912e2179SXuan Hu VMSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 18958c35d23Shuxuan0307 190912e2179SXuan Hu VMERGE_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 19158c35d23Shuxuan0307 192912e2179SXuan Hu VMSEQ_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 193912e2179SXuan Hu VMSNE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 194912e2179SXuan Hu VMSLTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 195912e2179SXuan Hu VMSLT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 196912e2179SXuan Hu VMSLEU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 197912e2179SXuan Hu VMSLE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 198912e2179SXuan Hu VMSGTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 199912e2179SXuan Hu VMSGT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 20058c35d23Shuxuan0307 201912e2179SXuan Hu VSLL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 202912e2179SXuan Hu VSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 203912e2179SXuan Hu VSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 204912e2179SXuan Hu VNSRL_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 205912e2179SXuan Hu VNSRA_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 20658c35d23Shuxuan0307 207912e2179SXuan Hu VSADDU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 208912e2179SXuan Hu VSADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 209912e2179SXuan Hu VSSUBU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 210912e2179SXuan Hu VSSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 21158c35d23Shuxuan0307 21258c35d23Shuxuan0307 213912e2179SXuan Hu VSMUL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 21458c35d23Shuxuan0307 215912e2179SXuan Hu VSSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 216912e2179SXuan Hu VSSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 21758c35d23Shuxuan0307 218b65b9ebaSXuan Hu VNCLIPU_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 219b65b9ebaSXuan Hu VNCLIP_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 22058c35d23Shuxuan0307 ) 22158c35d23Shuxuan0307 222b65b9ebaSXuan Hu val opivi: Array[(BitPat, XSDecodeBase)] = Array( 2230f038924SZhangZifei VADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.add, T, F, F, SelImm.IMM_OPIVIS), 224*bae0e6e5Sczw VRSUB_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.rsub, T, F, F, SelImm.IMM_OPIVIS), 22558c35d23Shuxuan0307 226912e2179SXuan Hu VAND_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 227912e2179SXuan Hu VOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 228912e2179SXuan Hu VXOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 22958c35d23Shuxuan0307 230912e2179SXuan Hu VRGATHER_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 23158c35d23Shuxuan0307 232912e2179SXuan Hu VSLIDEUP_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 233912e2179SXuan Hu VSLIDEDOWN_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 23458c35d23Shuxuan0307 235*bae0e6e5Sczw VADC_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.adc, T, F, F, SelImm.IMM_OPIVIS), 236*bae0e6e5Sczw VMADC_VIM -> OPIVI(SrcType.X, FuType.vipu, VipuType.madc, T, F, F, SelImm.IMM_OPIVIS), 237*bae0e6e5Sczw VMADC_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.madc0, T, F, F, SelImm.IMM_OPIVIS), 23858c35d23Shuxuan0307 239912e2179SXuan Hu VMERGE_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 24058c35d23Shuxuan0307 241912e2179SXuan Hu VMSEQ_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 242912e2179SXuan Hu VMSNE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 243912e2179SXuan Hu VMSLEU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 244912e2179SXuan Hu VMSLE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 245912e2179SXuan Hu VMSGTU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 246912e2179SXuan Hu VMSGT_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 24758c35d23Shuxuan0307 248912e2179SXuan Hu VSLL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 249912e2179SXuan Hu VSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 250912e2179SXuan Hu VSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 251912e2179SXuan Hu VNSRL_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 252912e2179SXuan Hu VNSRA_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 25358c35d23Shuxuan0307 254912e2179SXuan Hu VSADDU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 255912e2179SXuan Hu VSADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 25658c35d23Shuxuan0307 257912e2179SXuan Hu VSSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 258912e2179SXuan Hu VSSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 25958c35d23Shuxuan0307 260b65b9ebaSXuan Hu VNCLIPU_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 261b65b9ebaSXuan Hu VNCLIP_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 26258c35d23Shuxuan0307 263912e2179SXuan Hu VMV1R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 264912e2179SXuan Hu VMV2R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 265912e2179SXuan Hu VMV4R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 266912e2179SXuan Hu VMV8R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 26758c35d23Shuxuan0307 ) 2687f2b7720SXuan Hu 269b65b9ebaSXuan Hu val opmvv: Array[(BitPat, XSDecodeBase)] = Array( 270912e2179SXuan Hu VAADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 271912e2179SXuan Hu VAADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 272912e2179SXuan Hu VASUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 273912e2179SXuan Hu VASUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 274912e2179SXuan Hu VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 275912e2179SXuan Hu VCPOP_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 276912e2179SXuan Hu VDIV_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 277912e2179SXuan Hu VDIVU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 278912e2179SXuan Hu VFIRST_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 279912e2179SXuan Hu VID_V -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 280912e2179SXuan Hu VIOTA_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 281b65b9ebaSXuan Hu 282b65b9ebaSXuan Hu // VMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 283b65b9ebaSXuan Hu 284912e2179SXuan Hu VMADD_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 285912e2179SXuan Hu VMAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 286912e2179SXuan Hu VMANDN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 287912e2179SXuan Hu VMNAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 288912e2179SXuan Hu VMNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 289912e2179SXuan Hu VMOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 290912e2179SXuan Hu VMORN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 291912e2179SXuan Hu VMXNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 292912e2179SXuan Hu VMXOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 293912e2179SXuan Hu VMSBF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 294912e2179SXuan Hu VMSIF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 295912e2179SXuan Hu VMSOF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 296912e2179SXuan Hu VMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 297912e2179SXuan Hu VMULH_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 298912e2179SXuan Hu VMULHSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 299912e2179SXuan Hu VMULHU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 300b65b9ebaSXuan Hu 301912e2179SXuan Hu VMV_X_S -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 302912e2179SXuan Hu VNMSAC_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 303912e2179SXuan Hu VNMSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 304912e2179SXuan Hu VREDAND_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 305912e2179SXuan Hu VREDMAX_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 306912e2179SXuan Hu VREDMAXU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 307912e2179SXuan Hu VREDMIN_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 308912e2179SXuan Hu VREDMINU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 309912e2179SXuan Hu VREDOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 310912e2179SXuan Hu VREDSUM_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 311912e2179SXuan Hu VREDXOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 312912e2179SXuan Hu VREM_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 313912e2179SXuan Hu VREMU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 314912e2179SXuan Hu VSEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 315912e2179SXuan Hu VSEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 316912e2179SXuan Hu VSEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 317912e2179SXuan Hu VZEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 318912e2179SXuan Hu VZEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 319912e2179SXuan Hu VZEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 320912e2179SXuan Hu VWADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 321912e2179SXuan Hu VWADD_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 322912e2179SXuan Hu VWADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 323912e2179SXuan Hu VWADDU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 324912e2179SXuan Hu VWMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 325912e2179SXuan Hu VWMACCSU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 326912e2179SXuan Hu VWMACCU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 327912e2179SXuan Hu VWMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 328912e2179SXuan Hu VWMULSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 329912e2179SXuan Hu VWMULU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 330912e2179SXuan Hu VWSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 331912e2179SXuan Hu VWSUB_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 332912e2179SXuan Hu VWSUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 333b65b9ebaSXuan Hu VWSUBU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 334c6661c33SHaojin Tang ) 335912e2179SXuan Hu 336b65b9ebaSXuan Hu val opmvx: Array[(BitPat, XSDecodeBase)] = Array( 337912e2179SXuan Hu VAADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 338912e2179SXuan Hu VAADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 339912e2179SXuan Hu VASUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 340912e2179SXuan Hu VASUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 341912e2179SXuan Hu VDIV_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 342912e2179SXuan Hu VDIVU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 343912e2179SXuan Hu VMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 344912e2179SXuan Hu VMADD_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 345912e2179SXuan Hu VMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 346912e2179SXuan Hu VMULH_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 347912e2179SXuan Hu VMULHSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 348912e2179SXuan Hu VMULHU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 349912e2179SXuan Hu VMV_S_X -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 350b65b9ebaSXuan Hu 351912e2179SXuan Hu VNMSAC_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 352912e2179SXuan Hu VNMSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 353912e2179SXuan Hu VREM_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 354912e2179SXuan Hu VREMU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 355b65b9ebaSXuan Hu 356912e2179SXuan Hu VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 357912e2179SXuan Hu VSLIDE1UP_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 358912e2179SXuan Hu VWADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 359912e2179SXuan Hu VWADD_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 360912e2179SXuan Hu VWADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 361912e2179SXuan Hu VWADDU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 362b65b9ebaSXuan Hu 363b65b9ebaSXuan Hu // OutOfMemoryError 364912e2179SXuan Hu VWMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 365912e2179SXuan Hu VWMACCSU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 366912e2179SXuan Hu VWMACCU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 367b65b9ebaSXuan Hu 368912e2179SXuan Hu VWMACCUS_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 369912e2179SXuan Hu VWMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 370912e2179SXuan Hu VWMULSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 371b65b9ebaSXuan Hu // Ok 372912e2179SXuan Hu VWMULU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 373912e2179SXuan Hu VWSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 374912e2179SXuan Hu VWSUB_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 375912e2179SXuan Hu VWSUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 376b65b9ebaSXuan Hu VWSUBU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 377c6661c33SHaojin Tang ) 3787f2b7720SXuan Hu 379b65b9ebaSXuan Hu val opfvv: Array[(BitPat, XSDecodeBase)] = Array( 380b448988dSczw // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 38194c0d8cfSczw VFADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fadd , F, T, F), 38294c0d8cfSczw VFSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fsub, F, T, F), 383b448988dSczw 384b448988dSczw // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 385912e2179SXuan Hu VFWADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 386912e2179SXuan Hu VFWSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 387912e2179SXuan Hu VFWADD_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 388912e2179SXuan Hu VFWSUB_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 389b448988dSczw 390b448988dSczw // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 391912e2179SXuan Hu VFMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 392db72af19Sczw VFDIV_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.fdiv , F, T, F), 393b448988dSczw 394b448988dSczw // 13.5. Vector Widening Floating-Point Multiply 395912e2179SXuan Hu VFWMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 396b448988dSczw 397b448988dSczw // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 398bea9b026Sczw VFMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.fmacc, F, T, F), 399912e2179SXuan Hu VFNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 400912e2179SXuan Hu VFMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 401912e2179SXuan Hu VFNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 402912e2179SXuan Hu VFMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 403912e2179SXuan Hu VFNMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 404912e2179SXuan Hu VFMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 405912e2179SXuan Hu VFNMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 406b448988dSczw 407b448988dSczw // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 408912e2179SXuan Hu VFWMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 409912e2179SXuan Hu VFWNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 410912e2179SXuan Hu VFWMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 411912e2179SXuan Hu VFWNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 412b448988dSczw 413b448988dSczw // 13.8. Vector Floating-Point Square-Root Instruction 414912e2179SXuan Hu VFSQRT_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 415b448988dSczw 416b448988dSczw // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction 417912e2179SXuan Hu VFRSQRT7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 418b448988dSczw 419b448988dSczw // 13.10. Vector Floating-Point Reciprocal Estimate Instruction 420912e2179SXuan Hu VFREC7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 421b448988dSczw 422b448988dSczw // 13.11. Vector Floating-Point MIN/MAX Instructions 423912e2179SXuan Hu VFMIN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 424912e2179SXuan Hu VFMAX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 425b448988dSczw 426b448988dSczw // 13.12. Vector Floating-Point Sign-Injection Instructions 427912e2179SXuan Hu VFSGNJ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 428912e2179SXuan Hu VFSGNJN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 429912e2179SXuan Hu VFSGNJX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 430b448988dSczw 431b448988dSczw // 13.13. Vector Floating-Point Compare Instructions 432912e2179SXuan Hu VMFEQ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 433912e2179SXuan Hu VMFNE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 434912e2179SXuan Hu VMFLT_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 435912e2179SXuan Hu VMFLE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 436b448988dSczw 437b448988dSczw // 13.14. Vector Floating-Point Classify Instruction 438912e2179SXuan Hu VFCLASS_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 439b448988dSczw 440b448988dSczw // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions 441912e2179SXuan Hu VFCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 442912e2179SXuan Hu VFCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 443912e2179SXuan Hu VFCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 444912e2179SXuan Hu VFCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 445912e2179SXuan Hu VFCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 446912e2179SXuan Hu VFCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 447b448988dSczw 448b448988dSczw // 13.18. Widening Floating-Point/Integer Type-Convert Instructions 449912e2179SXuan Hu VFWCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 450912e2179SXuan Hu VFWCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 451912e2179SXuan Hu VFWCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 452912e2179SXuan Hu VFWCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 453912e2179SXuan Hu VFWCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 454912e2179SXuan Hu VFWCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 455912e2179SXuan Hu VFWCVT_F_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 456b448988dSczw 457b65b9ebaSXuan Hu // ! 458b448988dSczw // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions 459912e2179SXuan Hu VFNCVT_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 460912e2179SXuan Hu VFNCVT_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 461912e2179SXuan Hu VFNCVT_RTZ_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 462912e2179SXuan Hu VFNCVT_RTZ_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 463912e2179SXuan Hu VFNCVT_F_XU_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 464912e2179SXuan Hu VFNCVT_F_X_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 465912e2179SXuan Hu VFNCVT_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 466912e2179SXuan Hu VFNCVT_ROD_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 467b448988dSczw 468b448988dSczw // 14.3. Vector Single-Width Floating-Point Reduction Instructions 469912e2179SXuan Hu VFREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 470912e2179SXuan Hu VFREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 471912e2179SXuan Hu VFREDMAX_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 472912e2179SXuan Hu VFREDMIN_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 473b448988dSczw 474b448988dSczw // 14.4. Vector Widening Floating-Point Reduction Instructions 475912e2179SXuan Hu VFWREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 476912e2179SXuan Hu VFWREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 477b448988dSczw 478b448988dSczw // 16.2. Floating-Point Scalar Move Instructions 479912e2179SXuan Hu VFMV_F_S -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// f[rd] = vs2[0] (rs1=0) 480b448988dSczw ) 4817f2b7720SXuan Hu 482b65b9ebaSXuan Hu val opfvf: Array[(BitPat, XSDecodeBase)] = Array( 483b448988dSczw // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 48494c0d8cfSczw VFADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fadd , F, T, F), 48594c0d8cfSczw VFSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fsub, F, T, F), 486912e2179SXuan Hu VFRSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 487b448988dSczw 488b448988dSczw // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 489912e2179SXuan Hu VFWADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 490912e2179SXuan Hu VFWSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 491912e2179SXuan Hu VFWADD_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 492912e2179SXuan Hu VFWSUB_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 493b448988dSczw 494b448988dSczw // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 495912e2179SXuan Hu VFMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 496db72af19Sczw VFDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.fdiv , F, T, F), 497912e2179SXuan Hu VFRDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 498b448988dSczw 499b448988dSczw // 13.5. Vector Widening Floating-Point Multiply 500912e2179SXuan Hu VFWMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 501b448988dSczw 502b448988dSczw // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 503bea9b026Sczw VFMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.fmacc, F, T, F), 504912e2179SXuan Hu VFNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 505912e2179SXuan Hu VFMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 506912e2179SXuan Hu VFNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 507912e2179SXuan Hu VFMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 508912e2179SXuan Hu VFNMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 509912e2179SXuan Hu VFMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 510912e2179SXuan Hu VFNMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 511b448988dSczw 512b448988dSczw // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 513912e2179SXuan Hu VFWMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 514912e2179SXuan Hu VFWNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 515912e2179SXuan Hu VFWMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 516912e2179SXuan Hu VFWNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 517b448988dSczw 518b448988dSczw // 13.11. Vector Floating-Point MIN/MAX Instructions 519912e2179SXuan Hu VFMIN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 520912e2179SXuan Hu VFMAX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 521b448988dSczw 522b448988dSczw // 13.12. Vector Floating-Point Sign-Injection Instructions 523912e2179SXuan Hu VFSGNJ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 524912e2179SXuan Hu VFSGNJN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 525912e2179SXuan Hu VFSGNJX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 526b448988dSczw 527b448988dSczw // 13.13. Vector Floating-Point Compare Instructions 528912e2179SXuan Hu VMFEQ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 529912e2179SXuan Hu VMFNE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 530912e2179SXuan Hu VMFLT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 531912e2179SXuan Hu VMFLE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 532912e2179SXuan Hu VMFGT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 533912e2179SXuan Hu VMFGE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 534b448988dSczw 535b448988dSczw // 13.15. Vector Floating-Point Merge Instruction 536912e2179SXuan Hu VFMERGE_VFM -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 537b448988dSczw 538b448988dSczw // 13.16. Vector Floating-Point Move Instruction 539912e2179SXuan Hu VFMV_V_F -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// src2=SrcType.X 540b448988dSczw 541b448988dSczw // 16.2. Floating-Point Scalar Move Instructions 54299e169c5Sczw VFMV_S_F -> OPFVF(SrcType.fp, SrcType.vp, FuType.vppu, VppuType.f2s , F, T, F),// vs2=0 // vs3 = vd 543b448988dSczw 544b448988dSczw // 16.3.3. Vector Slide1up 54599e169c5Sczw VFSLIDE1UP_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vppu, VppuType.vslide1up, F, T, F),// vd[0]=f[rs1], vd[i+1] = vs2[i] 546b448988dSczw 547b448988dSczw // 16.3.4. Vector Slide1down Instruction 548b448988dSczw // vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1] 549912e2179SXuan Hu VFSLIDE1DOWN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1] 5507f2b7720SXuan Hu ) 5517f2b7720SXuan Hu 552b65b9ebaSXuan Hu val vset: Array[(BitPat, XSDecodeBase)] = Array( 5534aa9ed34Sfdy VSETVLI -> VSET(F, T, ALUOpType.vsetvli1, F, SelImm.IMM_VSETVLI), 5544aa9ed34Sfdy VSETIVLI -> VSET(T, T, ALUOpType.vsetivli1, F, SelImm.IMM_VSETIVLI), 5554aa9ed34Sfdy VSETVL -> VSET(F, F, ALUOpType.vsetvl1, T, SelImm.X), // flush pipe 556912e2179SXuan Hu ) 5577f2b7720SXuan Hu 558b65b9ebaSXuan Hu val vls: Array[(BitPat, XSDecodeBase)] = Array( 559912e2179SXuan Hu // 7.4. Vector Unit-Stride Instructions 560912e2179SXuan Hu VLE8_V -> VLD(SrcType.X, VlduType.dummy), 561912e2179SXuan Hu VLE16_V -> VLD(SrcType.X, VlduType.dummy), 562912e2179SXuan Hu VLE32_V -> VLD(SrcType.X, VlduType.dummy), 563912e2179SXuan Hu VLE64_V -> VLD(SrcType.X, VlduType.dummy), 564912e2179SXuan Hu VSE8_V -> VST(SrcType.X, VstuType.dummy), 565912e2179SXuan Hu VSE16_V -> VST(SrcType.X, VstuType.dummy), 566912e2179SXuan Hu VSE32_V -> VST(SrcType.X, VstuType.dummy), 567912e2179SXuan Hu VSE64_V -> VST(SrcType.X, VstuType.dummy), 568912e2179SXuan Hu VLM_V -> VLD(SrcType.X, VlduType.dummy, mask = T), 569912e2179SXuan Hu VSM_V -> VST(SrcType.X, VstuType.dummy, mask = T), 570912e2179SXuan Hu // 7.5. Vector Strided Instructions 571912e2179SXuan Hu VLSE8_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 572912e2179SXuan Hu VLSE16_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 573912e2179SXuan Hu VLSE32_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 574912e2179SXuan Hu VLSE64_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 575912e2179SXuan Hu VSSE8_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 576912e2179SXuan Hu VSSE16_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 577912e2179SXuan Hu VSSE32_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 578912e2179SXuan Hu VSSE64_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 579912e2179SXuan Hu // 7.6. Vector Indexed Instructions 580912e2179SXuan Hu VLUXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 581912e2179SXuan Hu VLUXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 582912e2179SXuan Hu VLUXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 583912e2179SXuan Hu VLUXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 584912e2179SXuan Hu VLOXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 585912e2179SXuan Hu VLOXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 586912e2179SXuan Hu VLOXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 587912e2179SXuan Hu VLOXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 588912e2179SXuan Hu VSUXEI8_V -> VLD(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 589912e2179SXuan Hu VSUXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 590912e2179SXuan Hu VSUXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 591912e2179SXuan Hu VSUXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 592912e2179SXuan Hu VSOXEI8_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 593912e2179SXuan Hu VSOXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 594912e2179SXuan Hu VSOXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 595912e2179SXuan Hu VSOXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 596912e2179SXuan Hu // 7.7. Unit-stride Fault-Only-First Loads 597912e2179SXuan Hu VLE8FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 598912e2179SXuan Hu VLE16FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 599912e2179SXuan Hu VLE32FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 600912e2179SXuan Hu VLE64FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 601912e2179SXuan Hu // 7.8. Vector Load/Store Segment Instructions 602912e2179SXuan Hu // 7.8.1. Vector Unit-Stride Segment Loads and Stores 603912e2179SXuan Hu // TODO 604912e2179SXuan Hu // 7.8.2. Vector Strided Segment Loads and Stores 605912e2179SXuan Hu // TODO 606912e2179SXuan Hu // 7.8.3. Vector Indexed Segment Loads and Stores 607912e2179SXuan Hu // TODO 608912e2179SXuan Hu // 7.9. Vector Load/Store Whole Register Instructions 609912e2179SXuan Hu VL1RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 610912e2179SXuan Hu VL1RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 611912e2179SXuan Hu VL1RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 612912e2179SXuan Hu VL1RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 613912e2179SXuan Hu VL2RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 614912e2179SXuan Hu VL2RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 615912e2179SXuan Hu VL2RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 616912e2179SXuan Hu VL2RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 617912e2179SXuan Hu VL4RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 618912e2179SXuan Hu VL4RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 619912e2179SXuan Hu VL4RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 620912e2179SXuan Hu VL4RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 621912e2179SXuan Hu VL8RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 622912e2179SXuan Hu VL8RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 623912e2179SXuan Hu VL8RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 624912e2179SXuan Hu VL8RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 625912e2179SXuan Hu VS1R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 626912e2179SXuan Hu VS2R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 627912e2179SXuan Hu VS4R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 628912e2179SXuan Hu VS8R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 629912e2179SXuan Hu ) 630912e2179SXuan Hu 631b65b9ebaSXuan Hu override val decodeArray: Array[(BitPat, XSDecodeBase)] = vset ++ vls ++ 632b65b9ebaSXuan Hu opivv ++ opivx ++ opivi ++ opmvv ++ opmvx ++ opfvv ++ opfvf 6337f2b7720SXuan Hu} 634