xref: /XiangShan/src/main/scala/xiangshan/backend/decode/VecDecoder.scala (revision b448988d15231dd49d271d522ef3ce622d23fdbf)
17f2b7720SXuan Hupackage xiangshan.backend.decode
27f2b7720SXuan Hu
37f2b7720SXuan Huimport chipsalliance.rocketchip.config.Parameters
47f2b7720SXuan Huimport chisel3._
57f2b7720SXuan Huimport chisel3.util._
67f2b7720SXuan Huimport freechips.rocketchip.util.uintToBitPat
77f2b7720SXuan Huimport utils._
87f2b7720SXuan Huimport xiangshan.ExceptionNO.illegalInstr
97f2b7720SXuan Huimport xiangshan._
107f2b7720SXuan Huimport freechips.rocketchip.rocket.Instructions._
117f2b7720SXuan Hu
127f2b7720SXuan Huabstract class VecType {
137f2b7720SXuan Hu  def X = BitPat("b?")
147f2b7720SXuan Hu  def N = BitPat("b0")
157f2b7720SXuan Hu  def Y = BitPat("b1")
167f2b7720SXuan Hu  def generate() : List[BitPat]
177f2b7720SXuan Hu  def asOldDecodeOutput(): List[BitPat] = {
187f2b7720SXuan Hu    val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate()
197f2b7720SXuan Hu    List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm)
207f2b7720SXuan Hu  }
217f2b7720SXuan Hu}
227f2b7720SXuan Hu
237f2b7720SXuan Hucase class OPIVV(fu: BitPat, fuOp: BitPat, vWen: Boolean, mWen: Boolean) extends VecType {
247f2b7720SXuan Hu  def generate() : List[BitPat] = {
257f2b7720SXuan Hu    List (SrcType.vp, SrcType.vp, SrcType.X, fu, fuOp, N, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
267f2b7720SXuan Hu  }
277f2b7720SXuan Hu}
287f2b7720SXuan Hu
297f2b7720SXuan Hucase class OPIVX() extends VecType {
307f2b7720SXuan Hu  def generate() : List[BitPat] = { null }
317f2b7720SXuan Hu}
327f2b7720SXuan Hu
337f2b7720SXuan Hucase class OPIVI() extends VecType {
347f2b7720SXuan Hu  def generate() : List[BitPat] = { null }
357f2b7720SXuan Hu}
367f2b7720SXuan Hu
377f2b7720SXuan Hucase class OPMVV(fu: BitPat, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any) extends VecType {
387f2b7720SXuan Hu  def generate() : List[BitPat] = {
397f2b7720SXuan Hu    List (SrcType.vp, SrcType.vp, SrcType.X, fu, fuOp, xWen.B, N, vWen.B, mWen.B, N, N, N, N, SelImm.X)
407f2b7720SXuan Hu  }
417f2b7720SXuan Hu}
427f2b7720SXuan Hu
437f2b7720SXuan Hucase class OPMVX() extends VecType {
447f2b7720SXuan Hu  def generate() : List[BitPat] = { null }
457f2b7720SXuan Hu}
467f2b7720SXuan Hu
47*b448988dSczwcase class OPFVV(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat,  fWen: Boolean, vWen: Boolean, mWen: Boolean) extends VecType {
48*b448988dSczw  def generate() : List[BitPat] = {
49*b448988dSczw    List (src1, SrcType.vp, src3, fu, fuOp, N, fWen.B, vWen.B, mWen.B, N, N, N, N, SelImm.X)
50*b448988dSczw  }
517f2b7720SXuan Hu}
527f2b7720SXuan Hu
53*b448988dSczwcase class OPFVF(src1:BitPat, src3:BitPat, fu: BitPat, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends VecType {
547f2b7720SXuan Hu  def generate() : List[BitPat] = {
55*b448988dSczw    List (src1, SrcType.vp, src3, fu, fuOp, N, fWen.B, vWen.B, mWen.B, N, N, N, N, SelImm.X)
567f2b7720SXuan Hu  }
577f2b7720SXuan Hu}
587f2b7720SXuan Hu
597f2b7720SXuan Hucase class VSET() extends VecType {
607f2b7720SXuan Hu  def generate() : List[BitPat] = { null }
617f2b7720SXuan Hu}
627f2b7720SXuan Hu
637f2b7720SXuan Hucase class VLS() extends VecType {
647f2b7720SXuan Hu  def generate() : List[BitPat] = { null }
657f2b7720SXuan Hu}
667f2b7720SXuan Hu
677f2b7720SXuan Huobject VecDecoder extends DecodeConstants {
687f2b7720SXuan Hu  private def F = false
697f2b7720SXuan Hu  private def T = true
707f2b7720SXuan Hu
717f2b7720SXuan Hu  val opivvTable: Array[(BitPat, List[BitPat])] = Array(
727f2b7720SXuan Hu    VADD_VV   -> OPIVV(FuType.vipu, VipuType.dummy, T, F).generate(),
737f2b7720SXuan Hu
747f2b7720SXuan Hu    VMSEQ_VV  -> OPIVV(FuType.vipu, VipuType.dummy, F, T).generate(),
757f2b7720SXuan Hu  )
767f2b7720SXuan Hu
777f2b7720SXuan Hu  val opivxTable: Array[(BitPat, List[BitPat])] = Array()
787f2b7720SXuan Hu  val opiviTable: Array[(BitPat, List[BitPat])] = Array()
797f2b7720SXuan Hu
807f2b7720SXuan Hu  val opmvvTable: Array[(BitPat, List[BitPat])] = Array()
817f2b7720SXuan Hu  val opmvxTable: Array[(BitPat, List[BitPat])] = Array()
827f2b7720SXuan Hu
83*b448988dSczw  val opfvvTable: Array[(BitPat, List[BitPat])] = Array(
84*b448988dSczw                       // OPFVV(fu: BitPat, fuOp: BitPat,  fWen: Boolean, vWen: Boolean, mWen: Boolean, others: Any)
85*b448988dSczw// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
86*b448988dSczwVFADD_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
87*b448988dSczwVFSUB_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
88*b448988dSczw
89*b448988dSczw// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
90*b448988dSczwVFWADD_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
91*b448988dSczwVFWSUB_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
92*b448988dSczwVFWADD_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
93*b448988dSczwVFWSUB_WV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
94*b448988dSczw
95*b448988dSczw// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
96*b448988dSczwVFMUL_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
97*b448988dSczwVFDIV_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
98*b448988dSczw
99*b448988dSczw// 13.5. Vector Widening Floating-Point Multiply
100*b448988dSczwVFWMUL_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
101*b448988dSczw
102*b448988dSczw// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
103*b448988dSczwVFMACC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
104*b448988dSczwVFNMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
105*b448988dSczwVFMSAC_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
106*b448988dSczwVFNMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
107*b448988dSczwVFMADD_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
108*b448988dSczwVFNMADD_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
109*b448988dSczwVFMSUB_VV          -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
110*b448988dSczwVFNMSUB_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
111*b448988dSczw
112*b448988dSczw// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
113*b448988dSczwVFWMACC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
114*b448988dSczwVFWNMACC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
115*b448988dSczwVFWMSAC_VV         -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
116*b448988dSczwVFWNMSAC_VV        -> OPFVV(SrcType.vp, SrcType.vp, FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
117*b448988dSczw
118*b448988dSczw// 13.8. Vector Floating-Point Square-Root Instruction
119*b448988dSczwVFSQRT_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
120*b448988dSczw
121*b448988dSczw// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
122*b448988dSczwVFRSQRT7_V         -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
123*b448988dSczw
124*b448988dSczw// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
125*b448988dSczwVFREC7_V           -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
126*b448988dSczw
127*b448988dSczw// 13.11. Vector Floating-Point MIN/MAX Instructions
128*b448988dSczwVFMIN_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
129*b448988dSczwVFMAX_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
130*b448988dSczw
131*b448988dSczw// 13.12. Vector Floating-Point Sign-Injection Instructions
132*b448988dSczwVFSGNJ_VV          -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
133*b448988dSczwVFSGNJN_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
134*b448988dSczwVFSGNJX_VV         -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
135*b448988dSczw
136*b448988dSczw// 13.13. Vector Floating-Point Compare Instructions
137*b448988dSczwVMFEQ_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
138*b448988dSczwVMFNE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
139*b448988dSczwVMFLT_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
140*b448988dSczwVMFLE_VV           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
141*b448988dSczw
142*b448988dSczw// 13.14. Vector Floating-Point Classify Instruction
143*b448988dSczwVFCLASS_V          -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
144*b448988dSczw
145*b448988dSczw// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
146*b448988dSczwVFCVT_XU_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
147*b448988dSczwVFCVT_X_F_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
148*b448988dSczwVFCVT_RTZ_XU_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
149*b448988dSczwVFCVT_RTZ_X_F_V    -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
150*b448988dSczwVFCVT_F_XU_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
151*b448988dSczwVFCVT_F_X_V        -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
152*b448988dSczw
153*b448988dSczw// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
154*b448988dSczwVFWCVT_XU_F_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
155*b448988dSczwVFWCVT_X_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
156*b448988dSczwVFWCVT_RTZ_XU_F_V  -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
157*b448988dSczwVFWCVT_RTZ_X_F_V   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
158*b448988dSczwVFWCVT_F_XU_V      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
159*b448988dSczwVFWCVT_F_X_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
160*b448988dSczwVFWCVT_F_F_V       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
161*b448988dSczw
162*b448988dSczw// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
163*b448988dSczwVFNCVT_XU_F_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
164*b448988dSczwVFNCVT_X_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
165*b448988dSczwVFNCVT_RTZ_XU_F_W  -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
166*b448988dSczwVFNCVT_RTZ_X_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
167*b448988dSczwVFNCVT_F_XU_W      -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
168*b448988dSczwVFNCVT_F_X_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
169*b448988dSczwVFNCVT_F_F_W       -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
170*b448988dSczwVFNCVT_ROD_F_F_W   -> OPFVV(SrcType.X , SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
171*b448988dSczw
172*b448988dSczw// 14.3. Vector Single-Width Floating-Point Reduction Instructions
173*b448988dSczwVFREDOSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
174*b448988dSczwVFREDUSUM_VS       -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
175*b448988dSczwVFREDMAX_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
176*b448988dSczwVFREDMIN_VS        -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
177*b448988dSczw
178*b448988dSczw// 14.4. Vector Widening Floating-Point Reduction Instructions
179*b448988dSczwVFWREDOSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
180*b448988dSczwVFWREDUSUM_VS      -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),
181*b448988dSczw
182*b448988dSczw// 16.2. Floating-Point Scalar Move Instructions
183*b448988dSczwVFMV_F_S           -> OPFVV(SrcType.vp, SrcType.X , FuType.vvpu, VfpuType.dummy, F, T, F).generate(),// f[rd] = vs2[0] (rs1=0)
184*b448988dSczw
185*b448988dSczw
186*b448988dSczw
187*b448988dSczw  )
1887f2b7720SXuan Hu
1897f2b7720SXuan Hu  val opfvfTable: Array[(BitPat, List[BitPat])] = Array(
190*b448988dSczw// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
191*b448988dSczwVFADD_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
192*b448988dSczwVFSUB_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
193*b448988dSczwVFRSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
194*b448988dSczw
195*b448988dSczw// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
196*b448988dSczwVFWADD_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
197*b448988dSczwVFWSUB_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
198*b448988dSczwVFWADD_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
199*b448988dSczwVFWSUB_WF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
200*b448988dSczw
201*b448988dSczw// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
202*b448988dSczwVFMUL_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
203*b448988dSczwVFDIV_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
204*b448988dSczwVFRDIV_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
205*b448988dSczw
206*b448988dSczw// 13.5. Vector Widening Floating-Point Multiply
207*b448988dSczwVFWMUL_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
208*b448988dSczw
209*b448988dSczw// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
210*b448988dSczwVFMACC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
211*b448988dSczwVFNMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
212*b448988dSczwVFMSAC_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
213*b448988dSczwVFNMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
214*b448988dSczwVFMADD_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
215*b448988dSczwVFNMADD_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
216*b448988dSczwVFMSUB_VF          -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
217*b448988dSczwVFNMSUB_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
218*b448988dSczw
219*b448988dSczw// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
220*b448988dSczwVFWMACC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
221*b448988dSczwVFWNMACC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
222*b448988dSczwVFWMSAC_VF         -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
223*b448988dSczwVFWNMSAC_VF        -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
224*b448988dSczw
225*b448988dSczw// 13.11. Vector Floating-Point MIN/MAX Instructions
226*b448988dSczwVFMIN_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
227*b448988dSczwVFMAX_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
228*b448988dSczw
229*b448988dSczw// 13.12. Vector Floating-Point Sign-Injection Instructions
230*b448988dSczwVFSGNJ_VF          -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
231*b448988dSczwVFSGNJN_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
232*b448988dSczwVFSGNJX_VF         -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
233*b448988dSczw
234*b448988dSczw// 13.13. Vector Floating-Point Compare Instructions
235*b448988dSczwVMFEQ_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
236*b448988dSczwVMFNE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
237*b448988dSczwVMFLT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
238*b448988dSczwVMFLE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
239*b448988dSczwVMFGT_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
240*b448988dSczwVMFGE_VF           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T).generate(),
241*b448988dSczw
242*b448988dSczw// 13.15. Vector Floating-Point Merge Instruction
243*b448988dSczwVFMERGE_VFM        -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),
244*b448988dSczw
245*b448988dSczw// 13.16. Vector Floating-Point Move Instruction
246*b448988dSczwVFMV_V_F           -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// src2=SrcType.X
247*b448988dSczw
248*b448988dSczw// 16.2. Floating-Point Scalar Move Instructions
249*b448988dSczwVFMV_S_F           -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vs2=0
250*b448988dSczw
251*b448988dSczw// 16.3.3. Vector Slide1up
252*b448988dSczw// vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i]
253*b448988dSczwVFSLIDE1UP_VF      -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vd[0]=f[rs1], vd[i+1] = vs2[i]
254*b448988dSczw
255*b448988dSczw// 16.3.4. Vector Slide1down Instruction
256*b448988dSczw// vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1]
257*b448988dSczwVFSLIDE1DOWN_VF    -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F).generate(),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1]
258*b448988dSczw
2597f2b7720SXuan Hu  )
2607f2b7720SXuan Hu
2617f2b7720SXuan Hu  val vsetTable: Array[(BitPat, List[BitPat])] = Array()
2627f2b7720SXuan Hu  val vlsTable: Array[(BitPat, List[BitPat])] = Array()
2637f2b7720SXuan Hu
2647f2b7720SXuan Hu  val table = opivvTable ++ opivxTable ++ opiviTable ++
2657f2b7720SXuan Hu              opmvvTable ++ opmvxTable ++
2667f2b7720SXuan Hu              opfvvTable ++ opfvfTable ++
2677f2b7720SXuan Hu              vsetTable ++ vlsTable
2687f2b7720SXuan Hu}
269