17f2b7720SXuan Hupackage xiangshan.backend.decode 27f2b7720SXuan Hu 3912e2179SXuan Huimport chisel3.util.BitPat.bitPatToUInt 47f2b7720SXuan Huimport chisel3.util._ 53a2e64c4SZhangZifeiimport freechips.rocketchip.rocket.Instructions._ 63b739f49SXuan Huimport freechips.rocketchip.util.uintToBitPat 77f2b7720SXuan Huimport xiangshan._ 8*730cfbc0SXuan Huimport xiangshan.backend.fu.FuType 9912e2179SXuan Huimport yunsuan.{VfpuType, VipuType} 107f2b7720SXuan Hu 11b65b9ebaSXuan Huabstract class VecDecode extends XSDecodeBase { 127f2b7720SXuan Hu def generate() : List[BitPat] 137f2b7720SXuan Hu def asOldDecodeOutput(): List[BitPat] = { 14912e2179SXuan Hu val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 157f2b7720SXuan Hu List (src1, src2, src3, fu, fuOp, xWen, fWen, xsTrap, noSpec, blockBack, flushPipe, selImm) 167f2b7720SXuan Hu } 17912e2179SXuan Hu def asFirstStageDecodeOutput(): List[BitPat] = { 18912e2179SXuan Hu val src1::src2::src3::fu::fuOp::xWen::fWen::vWen::mWen::vxsatWen::xsTrap::noSpec::blockBack::flushPipe::selImm::Nil = generate() 19912e2179SXuan Hu List (src1, src2, src3, fu, fuOp, xWen, fWen, bitPatToUInt(vWen) | bitPatToUInt(mWen), xsTrap, noSpec, blockBack, flushPipe, selImm) 20912e2179SXuan Hu } 217f2b7720SXuan Hu} 227f2b7720SXuan Hu 233b739f49SXuan Hucase class OPIVV(src3: BitPat, fu: Int, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 247f2b7720SXuan Hu def generate() : List[BitPat] = { 25b65b9ebaSXuan Hu XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, 26b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 277f2b7720SXuan Hu } 287f2b7720SXuan Hu} 297f2b7720SXuan Hu 303b739f49SXuan Hucase class OPIVX(src3: BitPat, fu: Int, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean) extends XSDecodeBase { 3158c35d23Shuxuan0307 def generate() : List[BitPat] = { 32b65b9ebaSXuan Hu XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 33b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 3458c35d23Shuxuan0307 } 357f2b7720SXuan Hu} 367f2b7720SXuan Hu 373b739f49SXuan Hucase class OPIVI(src3: BitPat, fu: Int, fuOp: BitPat, vWen: Boolean, mWen: Boolean, vxsatWen: Boolean, selImm: BitPat) extends XSDecodeBase { 3858c35d23Shuxuan0307 def generate() : List[BitPat] = { 39b65b9ebaSXuan Hu XSDecode(SrcType.imm, SrcType.vp, src3, fu, fuOp, selImm, 40b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 4158c35d23Shuxuan0307 } 427f2b7720SXuan Hu} 437f2b7720SXuan Hu 443b739f49SXuan Hucase class OPMVV(vdRen: Boolean, fu: Int, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 45c6661c33SHaojin Tang private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 467f2b7720SXuan Hu def generate() : List[BitPat] = { 47b65b9ebaSXuan Hu XSDecode(SrcType.vp, SrcType.vp, src3, fu, fuOp, SelImm.X, xWen, F, vWen, mWen, F, F, F, F).generate() 487f2b7720SXuan Hu } 497f2b7720SXuan Hu} 507f2b7720SXuan Hu 513b739f49SXuan Hucase class OPMVX(vdRen: Boolean, fu: Int, fuOp: BitPat, xWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 52c6661c33SHaojin Tang private def src3: BitPat = if (vdRen) SrcType.vp else SrcType.X 53c6661c33SHaojin Tang def generate() : List[BitPat] = { 54b65b9ebaSXuan Hu XSDecode(SrcType.xp, SrcType.vp, src3, fu, fuOp, SelImm.X, 55b65b9ebaSXuan Hu xWen = xWen, fWen = F, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 56c6661c33SHaojin Tang } 577f2b7720SXuan Hu} 587f2b7720SXuan Hu 593b739f49SXuan Hucase class OPFVV(src1:BitPat, src3:BitPat, fu: Int, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 60b448988dSczw def generate() : List[BitPat] = { 61b65b9ebaSXuan Hu XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 62b65b9ebaSXuan Hu xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 63b448988dSczw } 647f2b7720SXuan Hu} 657f2b7720SXuan Hu 663b739f49SXuan Hucase class OPFVF(src1:BitPat, src3:BitPat, fu: Int, fuOp: BitPat, fWen: Boolean, vWen: Boolean, mWen: Boolean) extends XSDecodeBase { 677f2b7720SXuan Hu def generate() : List[BitPat] = { 68b65b9ebaSXuan Hu XSDecode(src1, SrcType.vp, src3, fu, fuOp, SelImm.X, 69b65b9ebaSXuan Hu xWen = F, fWen = fWen, vWen = vWen, mWen = mWen, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 707f2b7720SXuan Hu } 717f2b7720SXuan Hu} 727f2b7720SXuan Hu 73b65b9ebaSXuan Hucase class VSET(vli: Boolean, vtypei: Boolean, fuOp: BitPat, flushPipe: Boolean, selImm: BitPat) extends XSDecodeBase { 74912e2179SXuan Hu def generate() : List[BitPat] = { 75912e2179SXuan Hu val src1 = if (vli) SrcType.imm else SrcType.xp 76912e2179SXuan Hu val src2 = if (vtypei) SrcType.imm else SrcType.xp 77b65b9ebaSXuan Hu XSDecode(src1, src2, SrcType.X, FuType.alu, fuOp, selImm, 78b65b9ebaSXuan Hu xWen = T, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = flushPipe).generate() 79912e2179SXuan Hu } 807f2b7720SXuan Hu} 817f2b7720SXuan Hu 82912e2179SXuan Hucase class VLD(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, ff: Boolean = false, 83b65b9ebaSXuan Hu mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 84912e2179SXuan Hu def generate() : List[BitPat] = { 85912e2179SXuan Hu val fu = FuType.vldu 86912e2179SXuan Hu val src1 = SrcType.xp 87912e2179SXuan Hu val src3 = SrcType.X 88b65b9ebaSXuan Hu XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 89b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = T, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 90912e2179SXuan Hu } 91912e2179SXuan Hu} 92912e2179SXuan Hu 93912e2179SXuan Hucase class VST(src2: BitPat, fuOp: BitPat, strided: Boolean = false, indexed: Boolean = false, 94b65b9ebaSXuan Hu mask: Boolean = false, whole: Boolean = false, ordered: Boolean = false) extends XSDecodeBase { 95912e2179SXuan Hu def generate() : List[BitPat] = { 96912e2179SXuan Hu val fu = FuType.vstu 97912e2179SXuan Hu val src1 = SrcType.xp 98912e2179SXuan Hu val src3 = SrcType.vp 99b65b9ebaSXuan Hu XSDecode(src1, src2, src3, fu, fuOp, SelImm.X, 100b65b9ebaSXuan Hu xWen = F, fWen = F, vWen = F, mWen = F, xsTrap = F, noSpec = F, blockBack = F, flushPipe = F).generate() 101912e2179SXuan Hu } 1027f2b7720SXuan Hu} 1037f2b7720SXuan Hu 1047f2b7720SXuan Huobject VecDecoder extends DecodeConstants { 105b65b9ebaSXuan Hu val opivv: Array[(BitPat, XSDecodeBase)] = Array( 106912e2179SXuan Hu VADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 107912e2179SXuan Hu VSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 1087f2b7720SXuan Hu 109912e2179SXuan Hu VMINU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 110912e2179SXuan Hu VMIN_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 111912e2179SXuan Hu VMAXU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 112912e2179SXuan Hu VMAX_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 11358c35d23Shuxuan0307 114912e2179SXuan Hu VAND_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 115912e2179SXuan Hu VOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 116912e2179SXuan Hu VXOR_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 11758c35d23Shuxuan0307 118912e2179SXuan Hu VRGATHER_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 119912e2179SXuan Hu VRGATHEREI16_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 12058c35d23Shuxuan0307 121912e2179SXuan Hu VADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 122912e2179SXuan Hu VMADC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 123912e2179SXuan Hu VMADC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 12458c35d23Shuxuan0307 125912e2179SXuan Hu VSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 126912e2179SXuan Hu VMSBC_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 127912e2179SXuan Hu VMSBC_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 12858c35d23Shuxuan0307 129912e2179SXuan Hu VMERGE_VVM -> OPIVV(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 13058c35d23Shuxuan0307 131912e2179SXuan Hu VMSEQ_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 132912e2179SXuan Hu VMSNE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 133912e2179SXuan Hu VMSLTU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 134912e2179SXuan Hu VMSLT_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 135912e2179SXuan Hu VMSLEU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 136912e2179SXuan Hu VMSLE_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 13758c35d23Shuxuan0307 138912e2179SXuan Hu VSLL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 139912e2179SXuan Hu VSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 140912e2179SXuan Hu VSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 141912e2179SXuan Hu VNSRL_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 142912e2179SXuan Hu VNSRA_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 14358c35d23Shuxuan0307 144912e2179SXuan Hu VSADDU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 145912e2179SXuan Hu VSADD_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 146912e2179SXuan Hu VSSUBU_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 147912e2179SXuan Hu VSSUB_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 14858c35d23Shuxuan0307 149912e2179SXuan Hu VSMUL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 15058c35d23Shuxuan0307 151912e2179SXuan Hu VSSRL_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 152912e2179SXuan Hu VSSRA_VV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 15358c35d23Shuxuan0307 154912e2179SXuan Hu VNCLIPU_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 155912e2179SXuan Hu VNCLIP_WV -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 15658c35d23Shuxuan0307 157912e2179SXuan Hu VWREDSUMU_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 158912e2179SXuan Hu VWREDSUM_VS -> OPIVV(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 1597f2b7720SXuan Hu ) 1607f2b7720SXuan Hu 161b65b9ebaSXuan Hu val opivx: Array[(BitPat, XSDecodeBase)] = Array( 162912e2179SXuan Hu VADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 163912e2179SXuan Hu VSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 164912e2179SXuan Hu VRSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 16558c35d23Shuxuan0307 166912e2179SXuan Hu VMINU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 167912e2179SXuan Hu VMIN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 168912e2179SXuan Hu VMAXU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 169912e2179SXuan Hu VMAX_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17058c35d23Shuxuan0307 171912e2179SXuan Hu VAND_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 172912e2179SXuan Hu VOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 173912e2179SXuan Hu VXOR_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17458c35d23Shuxuan0307 175912e2179SXuan Hu VRGATHER_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17658c35d23Shuxuan0307 177912e2179SXuan Hu VSLIDEUP_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 178912e2179SXuan Hu VSLIDEDOWN_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 17958c35d23Shuxuan0307 180912e2179SXuan Hu VADC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 181912e2179SXuan Hu VMADC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 182912e2179SXuan Hu VSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 183912e2179SXuan Hu VMSBC_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 184912e2179SXuan Hu VMSBC_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, F, T, F), 18558c35d23Shuxuan0307 186912e2179SXuan Hu VMERGE_VXM -> OPIVX(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F), 18758c35d23Shuxuan0307 188912e2179SXuan Hu VMSEQ_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 189912e2179SXuan Hu VMSNE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 190912e2179SXuan Hu VMSLTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 191912e2179SXuan Hu VMSLT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 192912e2179SXuan Hu VMSLEU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 193912e2179SXuan Hu VMSLE_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 194912e2179SXuan Hu VMSGTU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 195912e2179SXuan Hu VMSGT_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F), 19658c35d23Shuxuan0307 197912e2179SXuan Hu VSLL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 198912e2179SXuan Hu VSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 199912e2179SXuan Hu VSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 200912e2179SXuan Hu VNSRL_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 201912e2179SXuan Hu VNSRA_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 20258c35d23Shuxuan0307 203912e2179SXuan Hu VSADDU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 204912e2179SXuan Hu VSADD_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 205912e2179SXuan Hu VSSUBU_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 206912e2179SXuan Hu VSSUB_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 20758c35d23Shuxuan0307 20858c35d23Shuxuan0307 209912e2179SXuan Hu VSMUL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 21058c35d23Shuxuan0307 211912e2179SXuan Hu VSSRL_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 212912e2179SXuan Hu VSSRA_VX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F), 21358c35d23Shuxuan0307 214b65b9ebaSXuan Hu VNCLIPU_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 215b65b9ebaSXuan Hu VNCLIP_WX -> OPIVX(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T), 21658c35d23Shuxuan0307 ) 21758c35d23Shuxuan0307 218b65b9ebaSXuan Hu val opivi: Array[(BitPat, XSDecodeBase)] = Array( 219912e2179SXuan Hu VADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 220912e2179SXuan Hu VRSUB_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 22158c35d23Shuxuan0307 222912e2179SXuan Hu VAND_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 223912e2179SXuan Hu VOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 224912e2179SXuan Hu VXOR_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 22558c35d23Shuxuan0307 226912e2179SXuan Hu VRGATHER_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 22758c35d23Shuxuan0307 228912e2179SXuan Hu VSLIDEUP_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 229912e2179SXuan Hu VSLIDEDOWN_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 23058c35d23Shuxuan0307 231912e2179SXuan Hu VADC_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 232912e2179SXuan Hu VMADC_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 23358c35d23Shuxuan0307 234912e2179SXuan Hu VMERGE_VIM -> OPIVI(SrcType.vp, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 23558c35d23Shuxuan0307 236912e2179SXuan Hu VMSEQ_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 237912e2179SXuan Hu VMSNE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 238912e2179SXuan Hu VMSLEU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 239912e2179SXuan Hu VMSLE_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 240912e2179SXuan Hu VMSGTU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 241912e2179SXuan Hu VMSGT_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, F, T, F, SelImm.IMM_OPIVIS), 24258c35d23Shuxuan0307 243912e2179SXuan Hu VSLL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 244912e2179SXuan Hu VSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 245912e2179SXuan Hu VSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 246912e2179SXuan Hu VNSRL_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 247912e2179SXuan Hu VNSRA_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 24858c35d23Shuxuan0307 249912e2179SXuan Hu VSADDU_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 250912e2179SXuan Hu VSADD_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIS), 25158c35d23Shuxuan0307 252912e2179SXuan Hu VSSRL_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 253912e2179SXuan Hu VSSRA_VI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIU), 25458c35d23Shuxuan0307 255b65b9ebaSXuan Hu VNCLIPU_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 256b65b9ebaSXuan Hu VNCLIP_WI -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, T, SelImm.IMM_OPIVIU), 25758c35d23Shuxuan0307 258912e2179SXuan Hu VMV1R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 259912e2179SXuan Hu VMV2R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 260912e2179SXuan Hu VMV4R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 261912e2179SXuan Hu VMV8R_V -> OPIVI(SrcType.X, FuType.vipu, VipuType.dummy, T, F, F, SelImm.IMM_OPIVIS), 26258c35d23Shuxuan0307 ) 2637f2b7720SXuan Hu 264b65b9ebaSXuan Hu val opmvv: Array[(BitPat, XSDecodeBase)] = Array( 265912e2179SXuan Hu VAADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 266912e2179SXuan Hu VAADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 267912e2179SXuan Hu VASUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 268912e2179SXuan Hu VASUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 269912e2179SXuan Hu VCOMPRESS_VM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 270912e2179SXuan Hu VCPOP_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 271912e2179SXuan Hu VDIV_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 272912e2179SXuan Hu VDIVU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 273912e2179SXuan Hu VFIRST_M -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 274912e2179SXuan Hu VID_V -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 275912e2179SXuan Hu VIOTA_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 276b65b9ebaSXuan Hu 277b65b9ebaSXuan Hu // VMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 278b65b9ebaSXuan Hu 279912e2179SXuan Hu VMADD_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 280912e2179SXuan Hu VMAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 281912e2179SXuan Hu VMANDN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 282912e2179SXuan Hu VMNAND_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 283912e2179SXuan Hu VMNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 284912e2179SXuan Hu VMOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 285912e2179SXuan Hu VMORN_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 286912e2179SXuan Hu VMXNOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 287912e2179SXuan Hu VMXOR_MM -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 288912e2179SXuan Hu VMSBF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 289912e2179SXuan Hu VMSIF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 290912e2179SXuan Hu VMSOF_M -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 291912e2179SXuan Hu VMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 292912e2179SXuan Hu VMULH_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 293912e2179SXuan Hu VMULHSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 294912e2179SXuan Hu VMULHU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 295b65b9ebaSXuan Hu 296912e2179SXuan Hu VMV_X_S -> OPMVV(F, FuType.vipu, VipuType.dummy, T, F, F), 297912e2179SXuan Hu VNMSAC_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 298912e2179SXuan Hu VNMSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 299912e2179SXuan Hu VREDAND_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 300912e2179SXuan Hu VREDMAX_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 301912e2179SXuan Hu VREDMAXU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 302912e2179SXuan Hu VREDMIN_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 303912e2179SXuan Hu VREDMINU_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 304912e2179SXuan Hu VREDOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 305912e2179SXuan Hu VREDSUM_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 306912e2179SXuan Hu VREDXOR_VS -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 307912e2179SXuan Hu VREM_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 308912e2179SXuan Hu VREMU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 309912e2179SXuan Hu VSEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 310912e2179SXuan Hu VSEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 311912e2179SXuan Hu VSEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 312912e2179SXuan Hu VZEXT_VF2 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 313912e2179SXuan Hu VZEXT_VF4 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 314912e2179SXuan Hu VZEXT_VF8 -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 315912e2179SXuan Hu VWADD_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 316912e2179SXuan Hu VWADD_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 317912e2179SXuan Hu VWADDU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 318912e2179SXuan Hu VWADDU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 319912e2179SXuan Hu VWMACC_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 320912e2179SXuan Hu VWMACCSU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 321912e2179SXuan Hu VWMACCU_VV -> OPMVV(T, FuType.vipu, VipuType.dummy, F, T, F), 322912e2179SXuan Hu VWMUL_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 323912e2179SXuan Hu VWMULSU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 324912e2179SXuan Hu VWMULU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 325912e2179SXuan Hu VWSUB_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 326912e2179SXuan Hu VWSUB_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 327912e2179SXuan Hu VWSUBU_VV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 328b65b9ebaSXuan Hu VWSUBU_WV -> OPMVV(F, FuType.vipu, VipuType.dummy, F, T, F), 329c6661c33SHaojin Tang ) 330912e2179SXuan Hu 331b65b9ebaSXuan Hu val opmvx: Array[(BitPat, XSDecodeBase)] = Array( 332912e2179SXuan Hu VAADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 333912e2179SXuan Hu VAADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 334912e2179SXuan Hu VASUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 335912e2179SXuan Hu VASUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 336912e2179SXuan Hu VDIV_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 337912e2179SXuan Hu VDIVU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 338912e2179SXuan Hu VMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 339912e2179SXuan Hu VMADD_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 340912e2179SXuan Hu VMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 341912e2179SXuan Hu VMULH_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 342912e2179SXuan Hu VMULHSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 343912e2179SXuan Hu VMULHU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 344912e2179SXuan Hu VMV_S_X -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 345b65b9ebaSXuan Hu 346912e2179SXuan Hu VNMSAC_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 347912e2179SXuan Hu VNMSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 348912e2179SXuan Hu VREM_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 349912e2179SXuan Hu VREMU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 350b65b9ebaSXuan Hu 351912e2179SXuan Hu VSLIDE1DOWN_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 352912e2179SXuan Hu VSLIDE1UP_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 353912e2179SXuan Hu VWADD_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 354912e2179SXuan Hu VWADD_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 355912e2179SXuan Hu VWADDU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 356912e2179SXuan Hu VWADDU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 357b65b9ebaSXuan Hu 358b65b9ebaSXuan Hu // OutOfMemoryError 359912e2179SXuan Hu VWMACC_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 360912e2179SXuan Hu VWMACCSU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 361912e2179SXuan Hu VWMACCU_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 362b65b9ebaSXuan Hu 363912e2179SXuan Hu VWMACCUS_VX -> OPMVX(T, FuType.vipu, VipuType.dummy, F, T, F), 364912e2179SXuan Hu VWMUL_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 365912e2179SXuan Hu VWMULSU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 366b65b9ebaSXuan Hu // Ok 367912e2179SXuan Hu VWMULU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 368912e2179SXuan Hu VWSUB_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 369912e2179SXuan Hu VWSUB_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 370912e2179SXuan Hu VWSUBU_VX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 371b65b9ebaSXuan Hu VWSUBU_WX -> OPMVX(F, FuType.vipu, VipuType.dummy, F, T, F), 372c6661c33SHaojin Tang ) 3737f2b7720SXuan Hu 374b65b9ebaSXuan Hu val opfvv: Array[(BitPat, XSDecodeBase)] = Array( 375b448988dSczw // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 376912e2179SXuan Hu VFADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 377912e2179SXuan Hu VFSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 378b448988dSczw 379b448988dSczw // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 380912e2179SXuan Hu VFWADD_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 381912e2179SXuan Hu VFWSUB_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 382912e2179SXuan Hu VFWADD_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 383912e2179SXuan Hu VFWSUB_WV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 384b448988dSczw 385b448988dSczw // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 386912e2179SXuan Hu VFMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 387912e2179SXuan Hu VFDIV_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 388b448988dSczw 389b448988dSczw // 13.5. Vector Widening Floating-Point Multiply 390912e2179SXuan Hu VFWMUL_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 391b448988dSczw 392b448988dSczw // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 393912e2179SXuan Hu VFMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 394912e2179SXuan Hu VFNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 395912e2179SXuan Hu VFMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 396912e2179SXuan Hu VFNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 397912e2179SXuan Hu VFMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 398912e2179SXuan Hu VFNMADD_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 399912e2179SXuan Hu VFMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 400912e2179SXuan Hu VFNMSUB_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 401b448988dSczw 402b448988dSczw // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 403912e2179SXuan Hu VFWMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 404912e2179SXuan Hu VFWNMACC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 405912e2179SXuan Hu VFWMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 406912e2179SXuan Hu VFWNMSAC_VV -> OPFVV(SrcType.vp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 407b448988dSczw 408b448988dSczw // 13.8. Vector Floating-Point Square-Root Instruction 409912e2179SXuan Hu VFSQRT_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 410b448988dSczw 411b448988dSczw // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction 412912e2179SXuan Hu VFRSQRT7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 413b448988dSczw 414b448988dSczw // 13.10. Vector Floating-Point Reciprocal Estimate Instruction 415912e2179SXuan Hu VFREC7_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 416b448988dSczw 417b448988dSczw // 13.11. Vector Floating-Point MIN/MAX Instructions 418912e2179SXuan Hu VFMIN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 419912e2179SXuan Hu VFMAX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 420b448988dSczw 421b448988dSczw // 13.12. Vector Floating-Point Sign-Injection Instructions 422912e2179SXuan Hu VFSGNJ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 423912e2179SXuan Hu VFSGNJN_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 424912e2179SXuan Hu VFSGNJX_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 425b448988dSczw 426b448988dSczw // 13.13. Vector Floating-Point Compare Instructions 427912e2179SXuan Hu VMFEQ_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 428912e2179SXuan Hu VMFNE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 429912e2179SXuan Hu VMFLT_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 430912e2179SXuan Hu VMFLE_VV -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 431b448988dSczw 432b448988dSczw // 13.14. Vector Floating-Point Classify Instruction 433912e2179SXuan Hu VFCLASS_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 434b448988dSczw 435b448988dSczw // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions 436912e2179SXuan Hu VFCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 437912e2179SXuan Hu VFCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 438912e2179SXuan Hu VFCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 439912e2179SXuan Hu VFCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 440912e2179SXuan Hu VFCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 441912e2179SXuan Hu VFCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 442b448988dSczw 443b448988dSczw // 13.18. Widening Floating-Point/Integer Type-Convert Instructions 444912e2179SXuan Hu VFWCVT_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 445912e2179SXuan Hu VFWCVT_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 446912e2179SXuan Hu VFWCVT_RTZ_XU_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 447912e2179SXuan Hu VFWCVT_RTZ_X_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 448912e2179SXuan Hu VFWCVT_F_XU_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 449912e2179SXuan Hu VFWCVT_F_X_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 450912e2179SXuan Hu VFWCVT_F_F_V -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 451b448988dSczw 452b65b9ebaSXuan Hu // ! 453b448988dSczw // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions 454912e2179SXuan Hu VFNCVT_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 455912e2179SXuan Hu VFNCVT_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 456912e2179SXuan Hu VFNCVT_RTZ_XU_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 457912e2179SXuan Hu VFNCVT_RTZ_X_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 458912e2179SXuan Hu VFNCVT_F_XU_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 459912e2179SXuan Hu VFNCVT_F_X_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 460912e2179SXuan Hu VFNCVT_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 461912e2179SXuan Hu VFNCVT_ROD_F_F_W -> OPFVV(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 462b448988dSczw 463b448988dSczw // 14.3. Vector Single-Width Floating-Point Reduction Instructions 464912e2179SXuan Hu VFREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 465912e2179SXuan Hu VFREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 466912e2179SXuan Hu VFREDMAX_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 467912e2179SXuan Hu VFREDMIN_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 468b448988dSczw 469b448988dSczw // 14.4. Vector Widening Floating-Point Reduction Instructions 470912e2179SXuan Hu VFWREDOSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 471912e2179SXuan Hu VFWREDUSUM_VS -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 472b448988dSczw 473b448988dSczw // 16.2. Floating-Point Scalar Move Instructions 474912e2179SXuan Hu VFMV_F_S -> OPFVV(SrcType.vp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// f[rd] = vs2[0] (rs1=0) 475b448988dSczw ) 4767f2b7720SXuan Hu 477b65b9ebaSXuan Hu val opfvf: Array[(BitPat, XSDecodeBase)] = Array( 478b448988dSczw // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions 479912e2179SXuan Hu VFADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 480912e2179SXuan Hu VFSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 481912e2179SXuan Hu VFRSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 482b448988dSczw 483b448988dSczw // 13.3. Vector Widening Floating-Point Add/Subtract Instructions 484912e2179SXuan Hu VFWADD_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 485912e2179SXuan Hu VFWSUB_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 486912e2179SXuan Hu VFWADD_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 487912e2179SXuan Hu VFWSUB_WF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 488b448988dSczw 489b448988dSczw // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions 490912e2179SXuan Hu VFMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 491912e2179SXuan Hu VFDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 492912e2179SXuan Hu VFRDIV_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 493b448988dSczw 494b448988dSczw // 13.5. Vector Widening Floating-Point Multiply 495912e2179SXuan Hu VFWMUL_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 496b448988dSczw 497b448988dSczw // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions 498912e2179SXuan Hu VFMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 499912e2179SXuan Hu VFNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 500912e2179SXuan Hu VFMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 501912e2179SXuan Hu VFNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 502912e2179SXuan Hu VFMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 503912e2179SXuan Hu VFNMADD_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 504912e2179SXuan Hu VFMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 505912e2179SXuan Hu VFNMSUB_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 506b448988dSczw 507b448988dSczw // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions 508912e2179SXuan Hu VFWMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 509912e2179SXuan Hu VFWNMACC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 510912e2179SXuan Hu VFWMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 511912e2179SXuan Hu VFWNMSAC_VF -> OPFVF(SrcType.fp, SrcType.vp, FuType.vfpu, VfpuType.dummy, F, T, F), 512b448988dSczw 513b448988dSczw // 13.11. Vector Floating-Point MIN/MAX Instructions 514912e2179SXuan Hu VFMIN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 515912e2179SXuan Hu VFMAX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 516b448988dSczw 517b448988dSczw // 13.12. Vector Floating-Point Sign-Injection Instructions 518912e2179SXuan Hu VFSGNJ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 519912e2179SXuan Hu VFSGNJN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 520912e2179SXuan Hu VFSGNJX_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 521b448988dSczw 522b448988dSczw // 13.13. Vector Floating-Point Compare Instructions 523912e2179SXuan Hu VMFEQ_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 524912e2179SXuan Hu VMFNE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 525912e2179SXuan Hu VMFLT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 526912e2179SXuan Hu VMFLE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 527912e2179SXuan Hu VMFGT_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 528912e2179SXuan Hu VMFGE_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, F, T), 529b448988dSczw 530b448988dSczw // 13.15. Vector Floating-Point Merge Instruction 531912e2179SXuan Hu VFMERGE_VFM -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F), 532b448988dSczw 533b448988dSczw // 13.16. Vector Floating-Point Move Instruction 534912e2179SXuan Hu VFMV_V_F -> OPFVF(SrcType.X , SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// src2=SrcType.X 535b448988dSczw 536b448988dSczw // 16.2. Floating-Point Scalar Move Instructions 537912e2179SXuan Hu VFMV_S_F -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vs2=0 538b448988dSczw 539b448988dSczw // 16.3.3. Vector Slide1up 540b448988dSczw // vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i] 541912e2179SXuan Hu VFSLIDE1UP_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[0]=f[rs1], vd[i+1] = vs2[i] 542b448988dSczw 543b448988dSczw // 16.3.4. Vector Slide1down Instruction 544b448988dSczw // vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1] 545912e2179SXuan Hu VFSLIDE1DOWN_VF -> OPFVF(SrcType.fp, SrcType.X , FuType.vfpu, VfpuType.dummy, F, T, F),// vd[i] = vs2[i+1], vd[vl-1]=f[rs1] 5467f2b7720SXuan Hu ) 5477f2b7720SXuan Hu 548b65b9ebaSXuan Hu val vset: Array[(BitPat, XSDecodeBase)] = Array( 5494aa9ed34Sfdy VSETVLI -> VSET(F, T, ALUOpType.vsetvli1, F, SelImm.IMM_VSETVLI), 5504aa9ed34Sfdy VSETIVLI -> VSET(T, T, ALUOpType.vsetivli1, F, SelImm.IMM_VSETIVLI), 5514aa9ed34Sfdy VSETVL -> VSET(F, F, ALUOpType.vsetvl1, T, SelImm.X), // flush pipe 552912e2179SXuan Hu ) 5537f2b7720SXuan Hu 554b65b9ebaSXuan Hu val vls: Array[(BitPat, XSDecodeBase)] = Array( 555912e2179SXuan Hu // 7.4. Vector Unit-Stride Instructions 556912e2179SXuan Hu VLE8_V -> VLD(SrcType.X, VlduType.dummy), 557912e2179SXuan Hu VLE16_V -> VLD(SrcType.X, VlduType.dummy), 558912e2179SXuan Hu VLE32_V -> VLD(SrcType.X, VlduType.dummy), 559912e2179SXuan Hu VLE64_V -> VLD(SrcType.X, VlduType.dummy), 560912e2179SXuan Hu VSE8_V -> VST(SrcType.X, VstuType.dummy), 561912e2179SXuan Hu VSE16_V -> VST(SrcType.X, VstuType.dummy), 562912e2179SXuan Hu VSE32_V -> VST(SrcType.X, VstuType.dummy), 563912e2179SXuan Hu VSE64_V -> VST(SrcType.X, VstuType.dummy), 564912e2179SXuan Hu VLM_V -> VLD(SrcType.X, VlduType.dummy, mask = T), 565912e2179SXuan Hu VSM_V -> VST(SrcType.X, VstuType.dummy, mask = T), 566912e2179SXuan Hu // 7.5. Vector Strided Instructions 567912e2179SXuan Hu VLSE8_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 568912e2179SXuan Hu VLSE16_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 569912e2179SXuan Hu VLSE32_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 570912e2179SXuan Hu VLSE64_V -> VLD(SrcType.xp, VlduType.dummy, strided = T), 571912e2179SXuan Hu VSSE8_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 572912e2179SXuan Hu VSSE16_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 573912e2179SXuan Hu VSSE32_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 574912e2179SXuan Hu VSSE64_V -> VST(SrcType.xp, VstuType.dummy, strided = T), 575912e2179SXuan Hu // 7.6. Vector Indexed Instructions 576912e2179SXuan Hu VLUXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 577912e2179SXuan Hu VLUXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 578912e2179SXuan Hu VLUXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 579912e2179SXuan Hu VLUXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = F), 580912e2179SXuan Hu VLOXEI8_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 581912e2179SXuan Hu VLOXEI16_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 582912e2179SXuan Hu VLOXEI32_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 583912e2179SXuan Hu VLOXEI64_V -> VLD(SrcType.vp, VlduType.dummy, indexed = T, ordered = T), 584912e2179SXuan Hu VSUXEI8_V -> VLD(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 585912e2179SXuan Hu VSUXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 586912e2179SXuan Hu VSUXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 587912e2179SXuan Hu VSUXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = F), 588912e2179SXuan Hu VSOXEI8_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 589912e2179SXuan Hu VSOXEI16_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 590912e2179SXuan Hu VSOXEI32_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 591912e2179SXuan Hu VSOXEI64_V -> VST(SrcType.vp, VstuType.dummy, indexed = T, ordered = T), 592912e2179SXuan Hu // 7.7. Unit-stride Fault-Only-First Loads 593912e2179SXuan Hu VLE8FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 594912e2179SXuan Hu VLE16FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 595912e2179SXuan Hu VLE32FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 596912e2179SXuan Hu VLE64FF_V -> VLD(SrcType.X, VlduType.dummy, ff = T), 597912e2179SXuan Hu // 7.8. Vector Load/Store Segment Instructions 598912e2179SXuan Hu // 7.8.1. Vector Unit-Stride Segment Loads and Stores 599912e2179SXuan Hu // TODO 600912e2179SXuan Hu // 7.8.2. Vector Strided Segment Loads and Stores 601912e2179SXuan Hu // TODO 602912e2179SXuan Hu // 7.8.3. Vector Indexed Segment Loads and Stores 603912e2179SXuan Hu // TODO 604912e2179SXuan Hu // 7.9. Vector Load/Store Whole Register Instructions 605912e2179SXuan Hu VL1RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 606912e2179SXuan Hu VL1RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 607912e2179SXuan Hu VL1RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 608912e2179SXuan Hu VL1RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 609912e2179SXuan Hu VL2RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 610912e2179SXuan Hu VL2RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 611912e2179SXuan Hu VL2RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 612912e2179SXuan Hu VL2RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 613912e2179SXuan Hu VL4RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 614912e2179SXuan Hu VL4RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 615912e2179SXuan Hu VL4RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 616912e2179SXuan Hu VL4RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 617912e2179SXuan Hu VL8RE8_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 618912e2179SXuan Hu VL8RE16_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 619912e2179SXuan Hu VL8RE32_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 620912e2179SXuan Hu VL8RE64_V -> VLD(SrcType.X, VlduType.dummy, whole = T), 621912e2179SXuan Hu VS1R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 622912e2179SXuan Hu VS2R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 623912e2179SXuan Hu VS4R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 624912e2179SXuan Hu VS8R_V -> VST(SrcType.X, VlduType.dummy, whole = T), 625912e2179SXuan Hu ) 626912e2179SXuan Hu 627b65b9ebaSXuan Hu override val decodeArray: Array[(BitPat, XSDecodeBase)] = vset ++ vls ++ 628b65b9ebaSXuan Hu opivv ++ opivx ++ opivi ++ opmvv ++ opmvx ++ opfvv ++ opfvf 6297f2b7720SXuan Hu} 630