xref: /XiangShan/src/main/scala/utils/LowPowerState.scala (revision 30f35717e23156cb95b30a36db530384545b48a4)
1/***************************************************************************************
2 * Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences
3 * Copyright (c) 2020-2021 Peng Cheng Laboratory
4 *
5 * XiangShan is licensed under Mulan PSL v2.
6 * You can use this software according to the terms and conditions of the Mulan PSL v2.
7 * You may obtain a copy of Mulan PSL v2 at:
8 *          http://license.coscl.org.cn/MulanPSL2
9 *
10 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
11 * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
12 * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
13 *
14 * See the Mulan PSL v2 for more details.
15 ***************************************************************************************/
16
17package utils
18
19import chisel3._
20import chisel3.util._
21
22/* WFI state Update */
23object WfiStateNext {
24  val sNORMAL :: sGCLOCK :: sAWAKE :: sFLITWAKE :: Nil = Enum(4)
25
26  def apply(wfiState: UInt, isWFI: Bool, isNormal: Bool, flitpend: Bool, intSrc: UInt): UInt = {
27    val nextState = MuxCase(wfiState, Array(
28      (wfiState === sNORMAL && isWFI && isNormal && !intSrc.orR) -> sGCLOCK,
29      (wfiState === sGCLOCK && intSrc.orR) -> sAWAKE,
30      (wfiState === sGCLOCK && flitpend)   -> sFLITWAKE,
31      (wfiState === sFLITWAKE && ~isWFI)   -> sNORMAL,
32      (wfiState === sAWAKE && !intSrc.orR) -> sNORMAL
33    ).toIndexedSeq)
34
35    nextState
36  }
37}
38
39/* Core low power state Update  */
40object lpStateNext {
41  val sIDLE :: sL2FLUSH :: sWAITWFI :: sEXITCO :: sPOFFREQ :: Nil = Enum(5)
42
43  def apply(lpState: UInt, l2flush: Bool, l2FlushDone: Bool, isWFI: Bool, exitco: Bool): UInt = {
44    val nextState = MuxCase(lpState, Array(
45      (lpState === sIDLE && l2flush) -> sL2FLUSH,
46      (lpState === sL2FLUSH && l2FlushDone) -> sWAITWFI,
47      (lpState === sWAITWFI && isWFI ) -> sEXITCO,
48      (lpState === sEXITCO && exitco ) -> sPOFFREQ
49    ).toIndexedSeq)
50
51    nextState
52  }
53}
54