1618fb109Slinjiaweipackage utils 2618fb109Slinjiawei 3618fb109Slinjiaweiimport chisel3._ 4618fb109Slinjiaweiimport chipsalliance.rocketchip.config.Parameters 58f653805SLinJiaweiimport chisel3.util.DecoupledIO 6618fb109Slinjiaweiimport freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp} 78f653805SLinJiaweiimport freechips.rocketchip.tilelink.{TLBundle, TLClientNode, TLIdentityNode, TLMasterParameters, TLMasterPortParameters} 8e2801f97Slinjiaweiimport xiangshan.HasXSLog 9618fb109Slinjiawei 10618fb109Slinjiaweiclass DebugIdentityNode()(implicit p: Parameters) extends LazyModule { 11618fb109Slinjiawei 12618fb109Slinjiawei val node = TLIdentityNode() 13618fb109Slinjiawei 14618fb109Slinjiawei val n = TLClientNode(Seq(TLMasterPortParameters.v1( 15618fb109Slinjiawei Seq( 16618fb109Slinjiawei TLMasterParameters.v1("debug node") 17618fb109Slinjiawei ) 18618fb109Slinjiawei ))) 19618fb109Slinjiawei 20e2801f97Slinjiawei lazy val module = new LazyModuleImp(this) with HasXSLog with HasTLDump{ 21618fb109Slinjiawei val (out, _) = node.out(0) 22618fb109Slinjiawei val (in, _) = node.in(0) 238f653805SLinJiawei 248f653805SLinJiawei def debug(t: TLBundle, valid: Boolean = false): Unit ={ 258f653805SLinJiawei def fire[T <: Data](x: DecoupledIO[T]) = if(valid) x.valid else x.fire() 268f653805SLinJiawei val channels = Seq(t.a, t.b, t.c, t.d, t.e) 278f653805SLinJiawei channels.foreach(c => 288f653805SLinJiawei when(fire(c)){ 29*ab3aa7eeSBigWhiteDog XSDebug(" isFire:%d ",c.fire()) 308f653805SLinJiawei c.bits.dump 31618fb109Slinjiawei } 328f653805SLinJiawei ) 33618fb109Slinjiawei } 348f653805SLinJiawei debug(in, true) 35618fb109Slinjiawei } 36618fb109Slinjiawei} 370ccdef88Slinjiawei 380ccdef88Slinjiaweiobject DebugIdentityNode { 390ccdef88Slinjiawei def apply()(implicit p: Parameters): TLIdentityNode = { 400ccdef88Slinjiawei val identityNode = LazyModule(new DebugIdentityNode()) 410ccdef88Slinjiawei identityNode.node 420ccdef88Slinjiawei } 430ccdef88Slinjiawei}