xref: /XiangShan/src/main/scala/utils/DebugIdentityNode.scala (revision 618fb109099cc1d271e72520857cee13429b073c)
1*618fb109Slinjiaweipackage utils
2*618fb109Slinjiawei
3*618fb109Slinjiaweiimport chisel3._
4*618fb109Slinjiaweiimport chipsalliance.rocketchip.config.Parameters
5*618fb109Slinjiaweiimport freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp}
6*618fb109Slinjiaweiimport freechips.rocketchip.tilelink.{TLClientNode, TLIdentityNode, TLMasterParameters, TLMasterPortParameters}
7*618fb109Slinjiawei
8*618fb109Slinjiaweiclass DebugIdentityNode()(implicit p: Parameters) extends LazyModule {
9*618fb109Slinjiawei
10*618fb109Slinjiawei  val node = TLIdentityNode()
11*618fb109Slinjiawei
12*618fb109Slinjiawei  val n = TLClientNode(Seq(TLMasterPortParameters.v1(
13*618fb109Slinjiawei    Seq(
14*618fb109Slinjiawei      TLMasterParameters.v1("debug node")
15*618fb109Slinjiawei    )
16*618fb109Slinjiawei  )))
17*618fb109Slinjiawei
18*618fb109Slinjiawei  lazy val module = new LazyModuleImp(this){
19*618fb109Slinjiawei    val (out, _) = node.out(0)
20*618fb109Slinjiawei    val (in, _) = node.in(0)
21*618fb109Slinjiawei    when(in.a.fire()){
22*618fb109Slinjiawei      printf(p"[A] addr: ${Hexadecimal(in.a.bits.address)} " +
23*618fb109Slinjiawei        p"opcode: ${in.a.bits.opcode} data: ${Hexadecimal(in.a.bits.data)}\n"
24*618fb109Slinjiawei      )
25*618fb109Slinjiawei    }
26*618fb109Slinjiawei    when(in.d.fire()){
27*618fb109Slinjiawei      printf(p"[D] opcode: ${in.d.bits.opcode} data: ${Hexadecimal(in.d.bits.data)}\n")
28*618fb109Slinjiawei    }
29*618fb109Slinjiawei  }
30*618fb109Slinjiawei}
31