xref: /XiangShan/src/main/scala/utils/DataDontCareNode.scala (revision 5c5bd416ce761d956348a8e2fbbf268922371d8b)
1279a83c2SAllenpackage utils
2279a83c2SAllen
3279a83c2SAllenimport chisel3._
4279a83c2SAllenimport chipsalliance.rocketchip.config.Parameters
5279a83c2SAllenimport chisel3.util.DecoupledIO
6279a83c2SAllenimport freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp}
7279a83c2SAllenimport freechips.rocketchip.tilelink.{TLBundle, TLClientNode, TLIdentityNode, TLMasterParameters, TLMasterPortParameters}
8279a83c2SAllen
9279a83c2SAllenclass DataDontCareNode(a: Boolean = false, b: Boolean = false, c: Boolean = false, d: Boolean = false)(implicit p: Parameters) extends LazyModule  {
10279a83c2SAllen
11279a83c2SAllen  val node = TLIdentityNode()
12279a83c2SAllen
13279a83c2SAllen  val n = TLClientNode(Seq(TLMasterPortParameters.v1(
14279a83c2SAllen    Seq(
15279a83c2SAllen      TLMasterParameters.v1("DataDontCareNode")
16279a83c2SAllen    )
17279a83c2SAllen  )))
18279a83c2SAllen
19*5c5bd416Sljw  lazy val module = new LazyModuleImp(this) with HasTLDump{
20279a83c2SAllen    val (out, _) = node.out(0)
21279a83c2SAllen    val (in, _) = node.in(0)
22279a83c2SAllen
23279a83c2SAllen    if (a) {
24279a83c2SAllen      out.a.bits.data := DontCare
25279a83c2SAllen    }
26279a83c2SAllen    if (b) {
27279a83c2SAllen      in.b.bits.data := DontCare
28279a83c2SAllen    }
29279a83c2SAllen    if (c) {
30279a83c2SAllen      out.c.bits.data := DontCare
31279a83c2SAllen    }
32279a83c2SAllen    if (d) {
33279a83c2SAllen      in.d.bits.data := DontCare
34279a83c2SAllen    }
35279a83c2SAllen  }
36279a83c2SAllen}
37279a83c2SAllen
38279a83c2SAllenobject DataDontCareNode {
39279a83c2SAllen  def apply(a: Boolean = false, b: Boolean = false, c: Boolean = false, d: Boolean = false)(implicit p: Parameters): TLIdentityNode = {
40279a83c2SAllen    val dataDontCareNode = LazyModule(new DataDontCareNode(a, b, c, d))
41279a83c2SAllen    dataDontCareNode.node
42279a83c2SAllen  }
43279a83c2SAllen}
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