1*cc358710SLinJiawei/*************************************************************************************** 2*cc358710SLinJiawei* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences 3*cc358710SLinJiawei* Copyright (c) 2020-2021 Peng Cheng Laboratory 4*cc358710SLinJiawei* 5*cc358710SLinJiawei* XiangShan is licensed under Mulan PSL v2. 6*cc358710SLinJiawei* You can use this software according to the terms and conditions of the Mulan PSL v2. 7*cc358710SLinJiawei* You may obtain a copy of Mulan PSL v2 at: 8*cc358710SLinJiawei* http://license.coscl.org.cn/MulanPSL2 9*cc358710SLinJiawei* 10*cc358710SLinJiawei* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 11*cc358710SLinJiawei* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 12*cc358710SLinJiawei* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 13*cc358710SLinJiawei* 14*cc358710SLinJiawei* See the Mulan PSL v2 for more details. 15*cc358710SLinJiawei***************************************************************************************/ 16*cc358710SLinJiawei 17*cc358710SLinJiaweipackage top 18*cc358710SLinJiawei 19*cc358710SLinJiaweiimport chisel3.RawModule 20*cc358710SLinJiaweiimport chisel3.stage.{ChiselCli, ChiselGeneratorAnnotation} 21*cc358710SLinJiaweiimport firrtl.options.Shell 22*cc358710SLinJiaweiimport firrtl.stage.{FirrtlCli, RunFirrtlTransformAnnotation} 23*cc358710SLinJiaweiimport freechips.rocketchip.transforms.naming.RenameDesiredNames 24*cc358710SLinJiaweiimport xstransforms._ 25*cc358710SLinJiawei 26*cc358710SLinJiaweitrait XiangShanCli { this: Shell => 27*cc358710SLinJiawei parser.note("XiangShan Options") 28*cc358710SLinJiawei DisablePrintfAnnotation.addOptions(parser) 29*cc358710SLinJiawei EnablePrintfAnnotation.addOptions(parser) 30*cc358710SLinJiawei DisableAllPrintAnnotation.addOptions(parser) 31*cc358710SLinJiawei RemoveAssertAnnotation.addOptions(parser) 32*cc358710SLinJiawei} 33*cc358710SLinJiawei 34*cc358710SLinJiaweiclass XiangShanStage extends chisel3.stage.ChiselStage { 35*cc358710SLinJiawei override val shell: Shell = new Shell("xiangshan") 36*cc358710SLinJiawei with XiangShanCli 37*cc358710SLinJiawei with ChiselCli 38*cc358710SLinJiawei with FirrtlCli 39*cc358710SLinJiawei} 40*cc358710SLinJiawei 41*cc358710SLinJiaweiabstract class FirrtlCompiler 42*cc358710SLinJiaweicase object SFC extends FirrtlCompiler 43*cc358710SLinJiaweicase object MFC extends FirrtlCompiler 44*cc358710SLinJiawei 45*cc358710SLinJiaweiobject Generator { 46*cc358710SLinJiawei 47*cc358710SLinJiawei def execute(args: Array[String], mod: => RawModule, fc: FirrtlCompiler) = { 48*cc358710SLinJiawei fc match { 49*cc358710SLinJiawei case MFC => 50*cc358710SLinJiawei val sfcXsTransforms = Seq( 51*cc358710SLinJiawei DisablePrintfAnnotation, 52*cc358710SLinJiawei EnablePrintfAnnotation, 53*cc358710SLinJiawei DisableAllPrintAnnotation, 54*cc358710SLinJiawei RemoveAssertAnnotation 55*cc358710SLinJiawei ) 56*cc358710SLinJiawei val sfcOptions = sfcXsTransforms.flatMap(_.options.map(_.longOption)) ++ 57*cc358710SLinJiawei sfcXsTransforms.flatMap(_.options.flatMap(_.shortOption)) 58*cc358710SLinJiawei val mfcArgs = args.filter(s => { 59*cc358710SLinJiawei val option_s = if(s.startsWith("--")){ 60*cc358710SLinJiawei s.replace("--", "") 61*cc358710SLinJiawei } else if(s.startsWith("-")){ 62*cc358710SLinJiawei s.replace("-", "") 63*cc358710SLinJiawei } else s 64*cc358710SLinJiawei val cond = sfcOptions.contains(option_s) 65*cc358710SLinJiawei if(cond){ 66*cc358710SLinJiawei println(s"[Warnning] SFC Transform Option ${s} will be removed in MFC!") 67*cc358710SLinJiawei } 68*cc358710SLinJiawei !cond 69*cc358710SLinJiawei }) 70*cc358710SLinJiawei (new circt.stage.ChiselStage).execute(mfcArgs, Seq( 71*cc358710SLinJiawei ChiselGeneratorAnnotation(mod _), 72*cc358710SLinJiawei circt.stage.CIRCTTargetAnnotation(circt.stage.CIRCTTarget.Verilog), 73*cc358710SLinJiawei circt.stage.CIRCTHandover(circt.stage.CIRCTHandover.CHIRRTL) 74*cc358710SLinJiawei )) 75*cc358710SLinJiawei case SFC => 76*cc358710SLinJiawei (new XiangShanStage).execute(args, Seq( 77*cc358710SLinJiawei ChiselGeneratorAnnotation(mod _), 78*cc358710SLinJiawei RunFirrtlTransformAnnotation(new PrintControl), 79*cc358710SLinJiawei RunFirrtlTransformAnnotation(new PrintModuleName), 80*cc358710SLinJiawei RunFirrtlTransformAnnotation(new RenameDesiredNames) 81*cc358710SLinJiawei )) 82*cc358710SLinJiawei case _ => 83*cc358710SLinJiawei assert(false, s"Unknown firrtl compiler: ${fc.getClass.getName}!") 84*cc358710SLinJiawei } 85*cc358710SLinJiawei } 86*cc358710SLinJiawei 87*cc358710SLinJiawei} 88