xref: /XiangShan/src/main/scala/system/SoC.scala (revision 8f36f77917e5e76b7f0a83b213911d50ffb16217) 
1package system
2
3import noop.{NOOP, NOOPConfig}
4import bus.axi4.{AXI4, AXI4Lite}
5import bus.simplebus._
6
7import chisel3._
8
9class NOOPSoC(implicit val p: NOOPConfig) extends Module {
10  val io = IO(new Bundle{
11    val imem = new AXI4
12    val dmem = new AXI4
13    val mmio = (if (p.FPGAPlatform) { new AXI4Lite } else { new SimpleBusUL })
14  })
15
16  val noop = Module(new NOOP)
17  io.imem <> noop.io.imem.toAXI4()
18  io.dmem <> noop.io.dmem.toAXI4()
19
20  if (p.FPGAPlatform) io.mmio <> noop.io.mmio.toAXI4()
21  else io.mmio <> noop.io.mmio
22}
23