xref: /XiangShan/src/main/scala/device/AXI4Keyboard.scala (revision f320e0f01bd645f0a3045a8a740e60dd770734a9)
1/***************************************************************************************
2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences
3* Copyright (c) 2020-2021 Peng Cheng Laboratory
4*
5* XiangShan is licensed under Mulan PSL v2.
6* You can use this software according to the terms and conditions of the Mulan PSL v2.
7* You may obtain a copy of Mulan PSL v2 at:
8*          http://license.coscl.org.cn/MulanPSL2
9*
10* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
11* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
12* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
13*
14* See the Mulan PSL v2 for more details.
15***************************************************************************************/
16
17package device
18
19import chisel3._
20import chisel3.util._
21import chipsalliance.rocketchip.config.Parameters
22import freechips.rocketchip.diplomacy.AddressSet
23import utils._
24
25class KeyboardIO extends Bundle {
26  val ps2Clk = Input(Bool())
27  val ps2Data = Input(Bool())
28}
29
30// this Module is not tested
31class AXI4Keyboard
32(
33  address: Seq[AddressSet]
34)(implicit p: Parameters)
35  extends AXI4SlaveModule(address, executable = false, _extra = new KeyboardIO)
36{
37  override lazy val module = new AXI4SlaveModuleImp[KeyboardIO](this){
38    val buf = Reg(UInt(10.W))
39    val ps2ClkLatch = RegNext(io.extra.get.ps2Clk)
40    val negedge = RegNext(ps2ClkLatch) && ~ps2ClkLatch
41    when (negedge) { buf := Cat(io.extra.get.ps2Data, buf(9,1)) }
42
43    val cnt = Counter(negedge, 10)
44    val queue = Module(new Queue(UInt(8.W), 8))
45    queue.io.enq.valid := cnt._2 && !buf(0) && io.extra.get.ps2Data && buf(9,1).xorR
46    queue.io.enq.bits := buf(8,1)
47    queue.io.deq.ready := in.r.ready
48
49    in.r.bits.data := Mux(queue.io.deq.valid, queue.io.deq.bits, 0.U)
50  }
51
52}
53