xref: /XiangShan/build.sc (revision 9658ce50e75af9566868a3e788b4888e8be1859f)
1c6d43980SLemover/***************************************************************************************
2c6d43980SLemover* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences
3f320e0f0SYinan Xu* Copyright (c) 2020-2021 Peng Cheng Laboratory
4c6d43980SLemover*
5c6d43980SLemover* XiangShan is licensed under Mulan PSL v2.
6c6d43980SLemover* You can use this software according to the terms and conditions of the Mulan PSL v2.
7c6d43980SLemover* You may obtain a copy of Mulan PSL v2 at:
8c6d43980SLemover*          http://license.coscl.org.cn/MulanPSL2
9c6d43980SLemover*
10c6d43980SLemover* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
11c6d43980SLemover* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
12c6d43980SLemover* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
13c6d43980SLemover*
14c6d43980SLemover* See the Mulan PSL v2 for more details.
15c6d43980SLemover***************************************************************************************/
16c6d43980SLemover
17718a511dSLinJiaweiimport os.Path
182102afb5SLinJiaweiimport mill._
19718a511dSLinJiaweiimport scalalib._
2072060888SJiawei Linimport publish._
21c21bff99SJiawei Linimport coursier.maven.MavenRepository
2272060888SJiawei Linimport $file.`rocket-chip`.common
2372060888SJiawei Linimport $file.`rocket-chip`.`api-config-chipsalliance`.`build-rules`.mill.build
2472060888SJiawei Linimport $file.`rocket-chip`.hardfloat.build
252905e463SZihao Yu
2672060888SJiawei Linobject ivys {
2772060888SJiawei Lin  val sv = "2.12.13"
28*9658ce50SLinJiawei  val chisel3 = ivy"edu.berkeley.cs::chisel3:3.5.0"
29*9658ce50SLinJiawei  val chisel3Plugin = ivy"edu.berkeley.cs:::chisel3-plugin:3.5.0"
3072060888SJiawei Lin  val chiseltest = ivy"edu.berkeley.cs::chiseltest:0.3.2"
3172060888SJiawei Lin  val scalatest = ivy"org.scalatest::scalatest:3.2.2"
3272060888SJiawei Lin  val macroParadise = ivy"org.scalamacros:::paradise:2.1.1"
3372060888SJiawei Lin}
3472060888SJiawei Lin
3572060888SJiawei Lintrait XSModule extends ScalaModule with PublishModule {
3672060888SJiawei Lin
3772060888SJiawei Lin  // override this to use chisel from source
3872060888SJiawei Lin  def chiselOpt: Option[PublishModule] = None
3972060888SJiawei Lin
4072060888SJiawei Lin  override def scalaVersion = ivys.sv
4172060888SJiawei Lin
4272060888SJiawei Lin  override def compileIvyDeps = Agg(ivys.macroParadise)
4372060888SJiawei Lin
4472060888SJiawei Lin  override def scalacPluginIvyDeps = Agg(ivys.macroParadise, ivys.chisel3Plugin)
450332e41aSlinjiawei
462102afb5SLinJiawei  override def scalacOptions = Seq("-Xsource:2.11")
470332e41aSlinjiawei
4872060888SJiawei Lin  override def ivyDeps = if(chiselOpt.isEmpty) Agg(ivys.chisel3) else Agg.empty[Dep]
490332e41aSlinjiawei
5072060888SJiawei Lin  override def moduleDeps = Seq() ++ chiselOpt
510332e41aSlinjiawei
5272060888SJiawei Lin  def publishVersion = "0.0.1"
53c21bff99SJiawei Lin
5472060888SJiawei Lin  // TODO: fix this
5572060888SJiawei Lin  def pomSettings = PomSettings(
5672060888SJiawei Lin    description = "XiangShan",
5772060888SJiawei Lin    organization = "",
5872060888SJiawei Lin    url = "https://github.com/OpenXiangShan/XiangShan",
5972060888SJiawei Lin    licenses = Seq(License.`Apache-2.0`),
6072060888SJiawei Lin    versionControl = VersionControl.github("OpenXiangShan", "XiangShan"),
6172060888SJiawei Lin    developers = Seq.empty
62c21bff99SJiawei Lin  )
63c21bff99SJiawei Lin}
64c21bff99SJiawei Lin
6572060888SJiawei Linobject rocketchip extends `rocket-chip`.common.CommonRocketChip {
6672060888SJiawei Lin
6772060888SJiawei Lin  val rcPath = os.pwd / "rocket-chip"
6872060888SJiawei Lin
6972060888SJiawei Lin  override def scalaVersion = ivys.sv
7072060888SJiawei Lin
7172060888SJiawei Lin  override def scalacOptions = Seq("-Xsource:2.11")
7272060888SJiawei Lin
7372060888SJiawei Lin  override def millSourcePath = rcPath
7472060888SJiawei Lin
7572060888SJiawei Lin  object configRocket extends `rocket-chip`.`api-config-chipsalliance`.`build-rules`.mill.build.config with PublishModule {
7672060888SJiawei Lin    override def millSourcePath = rcPath / "api-config-chipsalliance" / "design" / "craft"
7772060888SJiawei Lin
7872060888SJiawei Lin    override def scalaVersion = T {
7972060888SJiawei Lin      rocketchip.scalaVersion()
802905e463SZihao Yu    }
812905e463SZihao Yu
8272060888SJiawei Lin    override def pomSettings = T {
8372060888SJiawei Lin      rocketchip.pomSettings()
842102afb5SLinJiawei    }
852102afb5SLinJiawei
8672060888SJiawei Lin    override def publishVersion = T {
8772060888SJiawei Lin      rocketchip.publishVersion()
8872060888SJiawei Lin    }
892102afb5SLinJiawei  }
902102afb5SLinJiawei
9172060888SJiawei Lin  object hardfloatRocket extends `rocket-chip`.hardfloat.build.hardfloat {
9272060888SJiawei Lin    override def millSourcePath = rcPath / "hardfloat"
93718a511dSLinJiawei
9472060888SJiawei Lin    override def scalaVersion = T {
9572060888SJiawei Lin      rocketchip.scalaVersion()
9672060888SJiawei Lin    }
97718a511dSLinJiawei
9872060888SJiawei Lin    def chisel3IvyDeps = if(chisel3Module.isEmpty) Agg(
9972060888SJiawei Lin      common.getVersion("chisel3")
10072060888SJiawei Lin    ) else Agg.empty[Dep]
10172060888SJiawei Lin  }
10272060888SJiawei Lin
10372060888SJiawei Lin  def hardfloatModule = hardfloatRocket
10472060888SJiawei Lin
10572060888SJiawei Lin  def configModule = configRocket
10672060888SJiawei Lin
10772060888SJiawei Lin}
10872060888SJiawei Lin
10972060888SJiawei Linobject huancun extends XSModule with SbtModule {
11072060888SJiawei Lin
11172060888SJiawei Lin  override def millSourcePath = os.pwd / "huancun"
112718a511dSLinJiawei
113718a511dSLinJiawei  override def moduleDeps = super.moduleDeps ++ Seq(
11472060888SJiawei Lin    rocketchip
115a1ea7f76SJiawei Lin  )
116718a511dSLinJiawei}
117718a511dSLinJiawei
11872060888SJiawei Linobject difftest extends XSModule with SbtModule {
119a3e87608SWilliam Wang  override def millSourcePath = os.pwd / "difftest"
120a3e87608SWilliam Wang}
121718a511dSLinJiawei
12272060888SJiawei Linobject fudian extends XSModule with SbtModule
123dc597826SJiawei Lin
12472060888SJiawei Lin// extends this trait to use XiangShan in other projects
12572060888SJiawei Lintrait CommonXiangShan extends XSModule with SbtModule { m =>
12672060888SJiawei Lin
12772060888SJiawei Lin  // module deps
12872060888SJiawei Lin  def rocketModule: PublishModule
12972060888SJiawei Lin  def difftestModule: PublishModule
13072060888SJiawei Lin  def huancunModule: PublishModule
13172060888SJiawei Lin  def fudianModule: PublishModule
13272060888SJiawei Lin
13372060888SJiawei Lin  override def millSourcePath = os.pwd
134718a511dSLinJiawei
1358b8e745dSYikeZhou  override def forkArgs = Seq("-Xmx64G", "-Xss256m")
136718a511dSLinJiawei
13772060888SJiawei Lin  override def ivyDeps = super.ivyDeps() ++ Seq(ivys.chiseltest)
13872060888SJiawei Lin
139c5f31b5bSLinJiawei  override def moduleDeps = super.moduleDeps ++ Seq(
14072060888SJiawei Lin    rocketModule,
14172060888SJiawei Lin    difftestModule,
14272060888SJiawei Lin    huancunModule,
14372060888SJiawei Lin    fudianModule
144c5f31b5bSLinJiawei  )
1452905e463SZihao Yu
14672060888SJiawei Lin  object test extends Tests with TestModule.ScalaTest {
1476f021e01SJiawei Lin
14872060888SJiawei Lin    override def forkArgs = m.forkArgs
1496f021e01SJiawei Lin
150718a511dSLinJiawei    override def ivyDeps = super.ivyDeps() ++ Agg(
15172060888SJiawei Lin      ivys.scalatest
1526aea7ec5SLinJiawei    )
153718a511dSLinJiawei
154fc85214eSLinJiawei  }
155718a511dSLinJiawei
1562905e463SZihao Yu}
15772060888SJiawei Lin
15872060888SJiawei Linobject XiangShan extends CommonXiangShan {
15972060888SJiawei Lin  override def rocketModule = rocketchip
16072060888SJiawei Lin  override def difftestModule = difftest
16172060888SJiawei Lin  override def huancunModule = huancun
16272060888SJiawei Lin  override def fudianModule = fudian
16372060888SJiawei Lin}
164